On Wed, Apr 04, 2018 at 04:53:51PM +0530, ryadav@xxxxxxxxxxxxxx wrote: > On 2018-04-04 15:56, Daniel Vetter wrote: > > On Wed, Apr 04, 2018 at 02:34:40PM +0530, Rajesh Yadav wrote: > > > MSM display controller hardware (DPU) has an inbuilt RSC block > > > which can control power resources and bus bandwidth voting > > > based on frame timing parameters w/o DPU driver intervention. > > > In absence of RSC HW, DPU driver controls these resources. > > > > > > Downstream driver relies on RSC driver for controlling these > > > resources (via RSC HW block) for better power benefits. > > > > > > Since, DPU driver can control these resources, removing RSC > > > driver support. Corresponding devicetree binding are also removed. > > > > If it has benefits, why remove the support for this? > > -Daniel > Currently, the dpu driver has custom implementation for power management. > We are planning to move to runtime_pm and this change is 1st step toward > that goal. > We will re-introduce the RSC support at a later stage when all the > dependencies > are sent upstream. That kind of context would be really good to explain in the commit message and cover letter. -Daniel > > Thanks, > Rajesh > > > > > > > > Details for DPU driver upstreaming: > > > https://lists.freedesktop.org/archives/freedreno/2018-February/001678.html > > > > > > Changes in v2: > > > - Remove last reference to dpu_power_rsc_update > > > - Add DPU PATCH tag for better filtering > > > - Rebase on tip of for-next-staging > > > > > > Rajesh Yadav (2): > > > dt-bindings: msm/disp: Remove DPU RSC device bindings > > > drm/msm: Remove RSC support from DPU driver > > > > > > .../devicetree/bindings/display/msm/dpu-rsc.txt | 96 -- > > > drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 130 +- > > > drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 6 - > > > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 14 - > > > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 9 +- > > > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 242 +--- > > > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 7 - > > > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 1 - > > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 20 +- > > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 3 - > > > drivers/gpu/drm/msm/dpu_dbg.c | 27 - > > > drivers/gpu/drm/msm/dpu_dbg.h | 10 - > > > drivers/gpu/drm/msm/dpu_power_handle.c | 73 +- > > > drivers/gpu/drm/msm/dpu_power_handle.h | 4 - > > > drivers/gpu/drm/msm/dpu_rsc.c | 1367 > > > -------------------- > > > drivers/gpu/drm/msm/dpu_rsc_hw.c | 818 > > > ------------ > > > drivers/gpu/drm/msm/dpu_rsc_priv.h | 191 --- > > > include/linux/dpu_rsc.h | 302 ----- > > > 18 files changed, 42 insertions(+), 3278 deletions(-) > > > delete mode 100644 > > > Documentation/devicetree/bindings/display/msm/dpu-rsc.txt > > > delete mode 100644 drivers/gpu/drm/msm/dpu_rsc.c > > > delete mode 100644 drivers/gpu/drm/msm/dpu_rsc_hw.c > > > delete mode 100644 drivers/gpu/drm/msm/dpu_rsc_priv.h > > > delete mode 100644 include/linux/dpu_rsc.h > > > > > > -- > > > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora > > > Forum, > > > a Linux Foundation Collaborative Project > > > > > > _______________________________________________ > > > dri-devel mailing list > > > dri-devel@xxxxxxxxxxxxxxxxxxxxx > > > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
