On 12/5/11 3:39 PM, Alexander Beregalov wrote:
At boot time: [drm:drm_edid_block_valid] *ERROR* EDID checksum is invalid, remainder is 206 Raw EDID: 27 0f 01 03 80 26 1e 78 2a de 95 a3 54 4c 99 26 0f 50 54 bf ef 80 81 80 81 40 71 4f 01 01 01 01 01 01 01 01 01 01 30 2a 00 98 51 00 2a 40 30 70 13 00 78 2d 11 00 00 1e 00 00 00 fd 00 38 4b 1e 51 0e 00 0a 20 20 20 20 20 20 00 00 00 fc 00 53 79 6e 63 4d 61 73 74 65 72 0a 20 20 00 00 00 ff 00 48 53 47 59 39 30 37 30 33 32 0a 20 20 00 59 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
This looks like an EDID fetch of bytes 16 through 143, instead of 0 through 127 (ie, skip the first 16, last 16 filled with -1).
Few days after that: [drm:drm_edid_block_valid] *ERROR* EDID checksum is invalid, remainder is 38 Raw EDID: 30 2a 00 98 51 00 2a 40 30 70 13 00 78 2d 11 00 00 1e 00 00 00 fd 00 38 4b 1e 51 0e 00 0a 20 20 20 20 20 20 00 00 00 fc 00 53 79 6e 63 4d 61 73 74 65 72 0a 20 20 00 00 00 ff 00 48 53 47 59 39 30 37 30 33 32 0a 20 20 00 59 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
Offset of 54 bytes here, which is weirder. Possibly the i2c code isn't resetting the index to 0 when it needs to. - ajax _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/dri-devel