https://bugzilla.kernel.org/show_bug.cgi?id=198883 --- Comment #63 from Ricardo Ribalda (ricardo.ribalda@xxxxxxxxx) --- Here you are gfx80.mmCB_DEBUG_BUS_1 => 0x00008801 gfx80.mmCB_DEBUG_BUS_2 => 0x00000000 gfx80.mmCB_DEBUG_BUS_3 => 0x00000000 gfx80.mmCB_DEBUG_BUS_4 => 0x00000000 gfx80.mmCB_DEBUG_BUS_5 => 0x00000000 gfx80.mmCB_DEBUG_BUS_6 => 0x00000000 gfx80.mmCB_DEBUG_BUS_7 => 0x00000000 gfx80.mmCB_DEBUG_BUS_8 => 0x00000000 gfx80.mmCB_DEBUG_BUS_9 => 0x00000000 gfx80.mmCB_DEBUG_BUS_10 => 0x0000e000 gfx80.mmCB_DEBUG_BUS_11 => 0x00000000 gfx80.mmCB_DEBUG_BUS_12 => 0x00000000 gfx80.mmCB_DEBUG_BUS_13 => 0x00000000 gfx80.mmCB_DEBUG_BUS_14 => 0x00000000 gfx80.mmCB_DEBUG_BUS_15 => 0x00000000 gfx80.mmCB_DEBUG_BUS_16 => 0x00000000 gfx80.mmCB_DEBUG_BUS_17 => 0x00000804 .TILE_INTFC_BUSY[0:0] == 0 (0x00000000) .MU_BUSY[1:1] == 0 (0x00000000) .TQ_BUSY[2:2] == 1 (0x00000001) .AC_BUSY[3:3] == 0 (0x00000000) .CRW_BUSY[4:4] == 0 (0x00000000) .CACHE_CTRL_BUSY[5:5] == 0 (0x00000000) .MC_WR_PENDING[6:6] == 0 (0x00000000) .FC_WR_PENDING[7:7] == 0 (0x00000000) .FC_RD_PENDING[8:8] == 0 (0x00000000) .EVICT_PENDING[9:9] == 0 (0x00000000) .LAST_RD_ARB_WINNER[10:10] == 0 (0x00000000) .MU_STATE[11:18] == 1 (0x00000001) gfx80.mmCB_DEBUG_BUS_18 => 0x00000100 .TILE_RETIREMENT_BUSY[0:0] == 0 (0x00000000) .FOP_BUSY[1:1] == 0 (0x00000000) .CLEAR_BUSY[2:2] == 0 (0x00000000) .LAT_BUSY[3:3] == 0 (0x00000000) .CACHE_CTL_BUSY[4:4] == 0 (0x00000000) .ADDR_BUSY[5:5] == 0 (0x00000000) .MERGE_BUSY[6:6] == 0 (0x00000000) .QUAD_BUSY[7:7] == 0 (0x00000000) .TILE_BUSY[8:8] == 1 (0x00000001) .DCC_BUSY[9:9] == 0 (0x00000000) .DOC_BUSY[10:10] == 0 (0x00000000) .DAG_BUSY[11:11] == 0 (0x00000000) .DOC_STALL[12:12] == 0 (0x00000000) .DOC_QT_CAM_FULL[13:13] == 0 (0x00000000) .DOC_CL_CAM_FULL[14:14] == 0 (0x00000000) .DOC_QUAD_PTR_FIFO_FULL[15:15] == 0 (0x00000000) .DOC_SECTOR_MASK_FIFO_FULL[16:16] == 0 (0x00000000) .DCS_READ_WINNER_LAST[17:17] == 0 (0x00000000) .DCS_READ_EV_PENDING[18:18] == 0 (0x00000000) .DCS_WRITE_CC_PENDING[19:19] == 0 (0x00000000) .DCS_READ_CC_PENDING[20:20] == 0 (0x00000000) .DCS_WRITE_MC_PENDING[21:21] == 0 (0x00000000) gfx80.mmCB_DEBUG_BUS_19 => 0x0005c000 .SURF_SYNC_STATE[0:1] == 0 (0x00000000) .SURF_SYNC_START[2:2] == 0 (0x00000000) .SF_BUSY[3:3] == 0 (0x00000000) .CS_BUSY[4:4] == 0 (0x00000000) .RB_BUSY[5:5] == 0 (0x00000000) .DS_BUSY[6:6] == 0 (0x00000000) .TB_BUSY[7:7] == 0 (0x00000000) .IB_BUSY[8:8] == 0 (0x00000000) .DRR_BUSY[9:9] == 0 (0x00000000) .DF_BUSY[10:10] == 0 (0x00000000) .DD_BUSY[11:11] == 0 (0x00000000) .DC_BUSY[12:12] == 0 (0x00000000) .DK_BUSY[13:13] == 0 (0x00000000) .DF_SKID_FIFO_EMPTY[14:14] == 1 (0x00000001) .DF_CLEAR_FIFO_EMPTY[15:15] == 1 (0x00000001) .DD_READY[16:16] == 1 (0x00000001) .DC_FIFO_FULL[17:17] == 0 (0x00000000) .DC_READY[18:18] == 1 (0x00000001) gfx80.mmCB_DEBUG_BUS_20 => 0x00f00820 .MC_RDREQ_CREDITS[0:5] == 32 (0x00000020) .MC_WRREQ_CREDITS[6:11] == 32 (0x00000020) .CC_RDREQ_HAD_ITS_TURN[12:12] == 0 (0x00000000) .FC_RDREQ_HAD_ITS_TURN[13:13] == 0 (0x00000000) .CM_RDREQ_HAD_ITS_TURN[14:14] == 0 (0x00000000) .CC_WRREQ_HAD_ITS_TURN[16:16] == 0 (0x00000000) .FC_WRREQ_HAD_ITS_TURN[17:17] == 0 (0x00000000) .CM_WRREQ_HAD_ITS_TURN[18:18] == 0 (0x00000000) .CC_WRREQ_FIFO_EMPTY[20:20] == 1 (0x00000001) .FC_WRREQ_FIFO_EMPTY[21:21] == 1 (0x00000001) .CM_WRREQ_FIFO_EMPTY[22:22] == 1 (0x00000001) .DCC_WRREQ_FIFO_EMPTY[23:23] == 1 (0x00000001) gfx80.mmCB_DEBUG_BUS_21 => 0x000000e3 .CM_BUSY[0:0] == 1 (0x00000001) .FC_BUSY[1:1] == 1 (0x00000001) .CC_BUSY[2:2] == 0 (0x00000000) .BB_BUSY[3:3] == 0 (0x00000000) .MA_BUSY[4:4] == 0 (0x00000000) .CORE_SCLK_VLD[5:5] == 1 (0x00000001) .REG_SCLK1_VLD[6:6] == 1 (0x00000001) .REG_SCLK0_VLD[7:7] == 1 (0x00000001) gfx80.mmCB_DEBUG_BUS_22 => 0x00000000 .OUTSTANDING_MC_READS[0:11] == 0 (0x00000000) .OUTSTANDING_MC_WRITES[12:23] == 0 (0x00000000) gfx80.mmCB_DEBUG_BUS_1 => 0x00008801 gfx80.mmCB_DEBUG_BUS_2 => 0x00000000 gfx80.mmCB_DEBUG_BUS_3 => 0x00000000 gfx80.mmCB_DEBUG_BUS_4 => 0x00000000 gfx80.mmCB_DEBUG_BUS_5 => 0x00000000 gfx80.mmCB_DEBUG_BUS_6 => 0x00000000 gfx80.mmCB_DEBUG_BUS_7 => 0x00000000 gfx80.mmCB_DEBUG_BUS_8 => 0x00000000 gfx80.mmCB_DEBUG_BUS_9 => 0x00000000 gfx80.mmCB_DEBUG_BUS_10 => 0x0000e000 gfx80.mmCB_DEBUG_BUS_11 => 0x00000000 gfx80.mmCB_DEBUG_BUS_12 => 0x00000000 gfx80.mmCB_DEBUG_BUS_13 => 0x00000000 gfx80.mmCB_DEBUG_BUS_14 => 0x00000000 gfx80.mmCB_DEBUG_BUS_15 => 0x00000000 gfx80.mmCB_DEBUG_BUS_16 => 0x00000000 gfx80.mmCB_DEBUG_BUS_17 => 0x00000804 .TILE_INTFC_BUSY[0:0] == 0 (0x00000000) .MU_BUSY[1:1] == 0 (0x00000000) .TQ_BUSY[2:2] == 1 (0x00000001) .AC_BUSY[3:3] == 0 (0x00000000) .CRW_BUSY[4:4] == 0 (0x00000000) .CACHE_CTRL_BUSY[5:5] == 0 (0x00000000) .MC_WR_PENDING[6:6] == 0 (0x00000000) .FC_WR_PENDING[7:7] == 0 (0x00000000) .FC_RD_PENDING[8:8] == 0 (0x00000000) .EVICT_PENDING[9:9] == 0 (0x00000000) .LAST_RD_ARB_WINNER[10:10] == 0 (0x00000000) .MU_STATE[11:18] == 1 (0x00000001) gfx80.mmCB_DEBUG_BUS_18 => 0x00000100 .TILE_RETIREMENT_BUSY[0:0] == 0 (0x00000000) .FOP_BUSY[1:1] == 0 (0x00000000) .CLEAR_BUSY[2:2] == 0 (0x00000000) .LAT_BUSY[3:3] == 0 (0x00000000) .CACHE_CTL_BUSY[4:4] == 0 (0x00000000) .ADDR_BUSY[5:5] == 0 (0x00000000) .MERGE_BUSY[6:6] == 0 (0x00000000) .QUAD_BUSY[7:7] == 0 (0x00000000) .TILE_BUSY[8:8] == 1 (0x00000001) .DCC_BUSY[9:9] == 0 (0x00000000) .DOC_BUSY[10:10] == 0 (0x00000000) .DAG_BUSY[11:11] == 0 (0x00000000) .DOC_STALL[12:12] == 0 (0x00000000) .DOC_QT_CAM_FULL[13:13] == 0 (0x00000000) .DOC_CL_CAM_FULL[14:14] == 0 (0x00000000) .DOC_QUAD_PTR_FIFO_FULL[15:15] == 0 (0x00000000) .DOC_SECTOR_MASK_FIFO_FULL[16:16] == 0 (0x00000000) .DCS_READ_WINNER_LAST[17:17] == 0 (0x00000000) .DCS_READ_EV_PENDING[18:18] == 0 (0x00000000) .DCS_WRITE_CC_PENDING[19:19] == 0 (0x00000000) .DCS_READ_CC_PENDING[20:20] == 0 (0x00000000) .DCS_WRITE_MC_PENDING[21:21] == 0 (0x00000000) gfx80.mmCB_DEBUG_BUS_19 => 0x0005c000 .SURF_SYNC_STATE[0:1] == 0 (0x00000000) .SURF_SYNC_START[2:2] == 0 (0x00000000) .SF_BUSY[3:3] == 0 (0x00000000) .CS_BUSY[4:4] == 0 (0x00000000) .RB_BUSY[5:5] == 0 (0x00000000) .DS_BUSY[6:6] == 0 (0x00000000) .TB_BUSY[7:7] == 0 (0x00000000) .IB_BUSY[8:8] == 0 (0x00000000) .DRR_BUSY[9:9] == 0 (0x00000000) .DF_BUSY[10:10] == 0 (0x00000000) .DD_BUSY[11:11] == 0 (0x00000000) .DC_BUSY[12:12] == 0 (0x00000000) .DK_BUSY[13:13] == 0 (0x00000000) .DF_SKID_FIFO_EMPTY[14:14] == 1 (0x00000001) .DF_CLEAR_FIFO_EMPTY[15:15] == 1 (0x00000001) .DD_READY[16:16] == 1 (0x00000001) .DC_FIFO_FULL[17:17] == 0 (0x00000000) .DC_READY[18:18] == 1 (0x00000001) gfx80.mmCB_DEBUG_BUS_20 => 0x00f00820 .MC_RDREQ_CREDITS[0:5] == 32 (0x00000020) .MC_WRREQ_CREDITS[6:11] == 32 (0x00000020) .CC_RDREQ_HAD_ITS_TURN[12:12] == 0 (0x00000000) .FC_RDREQ_HAD_ITS_TURN[13:13] == 0 (0x00000000) .CM_RDREQ_HAD_ITS_TURN[14:14] == 0 (0x00000000) .CC_WRREQ_HAD_ITS_TURN[16:16] == 0 (0x00000000) .FC_WRREQ_HAD_ITS_TURN[17:17] == 0 (0x00000000) .CM_WRREQ_HAD_ITS_TURN[18:18] == 0 (0x00000000) .CC_WRREQ_FIFO_EMPTY[20:20] == 1 (0x00000001) .FC_WRREQ_FIFO_EMPTY[21:21] == 1 (0x00000001) .CM_WRREQ_FIFO_EMPTY[22:22] == 1 (0x00000001) .DCC_WRREQ_FIFO_EMPTY[23:23] == 1 (0x00000001) gfx80.mmCB_DEBUG_BUS_21 => 0x000000e3 .CM_BUSY[0:0] == 1 (0x00000001) .FC_BUSY[1:1] == 1 (0x00000001) .CC_BUSY[2:2] == 0 (0x00000000) .BB_BUSY[3:3] == 0 (0x00000000) .MA_BUSY[4:4] == 0 (0x00000000) .CORE_SCLK_VLD[5:5] == 1 (0x00000001) .REG_SCLK1_VLD[6:6] == 1 (0x00000001) .REG_SCLK0_VLD[7:7] == 1 (0x00000001) gfx80.mmCB_DEBUG_BUS_22 => 0x00000000 .OUTSTANDING_MC_READS[0:11] == 0 (0x00000000) .OUTSTANDING_MC_WRITES[12:23] == 0 (0x00000000) Thanks! -- You are receiving this mail because: You are watching the assignee of the bug. _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
