On Fri, Mar 02, 2018 at 01:32:40AM +0100, Stefan Schake wrote: > We allow alpha formats on the primary plane but a partially transparent > framebuffer will cause a corrupted display. With this change black pixels > are output instead, in line with the behavior for other DRM drivers. > > Signed-off-by: Stefan Schake <stschake@xxxxxxxxx> > --- > Test program is available at https://github.com/stschake/vc4-alpha-test > > drivers/gpu/drm/vc4/vc4_plane.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c > index 61ad955..8c829fa 100644 > --- a/drivers/gpu/drm/vc4/vc4_plane.c > +++ b/drivers/gpu/drm/vc4/vc4_plane.c > @@ -521,6 +521,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane, > u32 ctl0_offset = vc4_state->dlist_count; > const struct hvs_format *format = vc4_get_hvs_format(fb->format->format); > int num_planes = drm_format_num_planes(format->drm); > + bool primary_plane = state->crtc->primary == plane; > u32 scl0, scl1, pitch0; > u32 lbm_size, tiling; > unsigned long irqflags; > @@ -620,8 +621,12 @@ static int vc4_plane_mode_set(struct drm_plane *plane, > > /* Position Word 2: Source Image Size, Alpha Mode */ > vc4_state->pos2_offset = vc4_state->dlist_count; > + /* We do not enable the HVS background color fill so the primary plane > + * must be opaque to avoid display artifacts. Achieve this by always > + * using fixed alpha (initialized to 0xff above) on the primary plane. > + */ > vc4_dlist_write(vc4_state, > - VC4_SET_FIELD(fb->format->has_alpha ? > + VC4_SET_FIELD(fb->format->has_alpha && !primary_plane ? If you want the plane to always be opaque you shouldn't expose any formats with alpha. Also what happens if one disables the primary plane? Or does the driver not allow that? > SCALER_POS2_ALPHA_MODE_PIPELINE : > SCALER_POS2_ALPHA_MODE_FIXED, > SCALER_POS2_ALPHA_MODE) | > -- > 2.7.4 > > _______________________________________________ > dri-devel mailing list > dri-devel@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Ville Syrjälä Intel OTC _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
