OF graph describes MHL data lanes between MHL and respective USB connector. Signed-off-by: Andrzej Hajda <a.hajda@xxxxxxxxxxx> --- v4: - added missing reg property in connector's port node (Krzysztof) --- .../boot/dts/exynos/exynos5433-tm2-common.dtsi | 32 ++++++++++++++++++++-- 1 file changed, 29 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi index f604f6b1a9c2..2ed506df94d0 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi @@ -817,9 +817,22 @@ clocks = <&pmu_system_controller 0>; clock-names = "xtal"; - port { - mhl_to_hdmi: endpoint { - remote-endpoint = <&hdmi_to_mhl>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mhl_to_hdmi: endpoint { + remote-endpoint = <&hdmi_to_mhl>; + }; + }; + + port@1 { + reg = <1>; + mhl_to_musb_con: endpoint { + remote-endpoint = <&musb_con_to_mhl>; + }; }; }; }; @@ -842,6 +855,19 @@ "usb-b-connector"; label = "micro-USB"; type = "micro"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@3 { + reg = <3>; + musb_con_to_mhl: endpoint { + remote-endpoint = <&mhl_to_musb_con>; + }; + }; + }; + }; }; }; -- 2.16.1 _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel