| What | Removed | Added |
|---|---|---|
| Component | DRM/Intel | IGT |
| QA Contact | intel-gfx-bugs@lists.freedesktop.org | |
| Whiteboard | ReadyForDev | |
| Assignee | intel-gfx-bugs@lists.freedesktop.org | dri-devel@lists.freedesktop.org |
Comment # 1
on bug 104895
from Marta Löfstedt
IGT-Version: 1.21-g7f0be0e7 author Mika Kuoppala <mika.kuoppala@linux.intel.com> 2018-01-10 15:42:58 +0200 committer Mika Kuoppala <mika.kuoppala@linux.intel.com> 2018-01-31 15:27:09 +0200 commit 7f0be0e7d9becb79630093bf0e6daeadcd937062 (patch) tools/intel_reg: Add reading and writing registers through engineHEADmaster Add option to specify engine for register read/write operation. If engine is specified, use MI_LOAD_REGISTER_IMM and MI_STORE_REGISTER_IMM to write and read register using a batch targeted at that engine. v2: no MI_NOOP after BBE (Chris) v3: use modern engine names (Chris), use global fd v4: strcasecmp (Chris) v5: use register definition format for engine (Jani) Cc: Jani Nikula <jani.nikula@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> CC: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> (v4) Acked-by: Jani Nikula <jani.nikula@intel.com>
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