On Friday, 2018-01-26 08:26:15 -0500, Andrey Grodzovsky wrote: > > > On 01/26/2018 06:32 AM, Eric Engestrom wrote: > > While at it, align with the other half on the next line. > > > > Cc: Andrey Grodzovsky <andrey.grodzovsky@xxxxxxx> > > Signed-off-by: Eric Engestrom <eric.engestrom@xxxxxxxxxx> > > --- > > Andrey, is that `0xfffffffc` right? It looks weird to me to be > > discarding the bottom two bits. > > That correct according to the PM4 packet spec, > (e.g. http://amd-dev.wpengine.netdna-cdn.com/wordpress/media/2013/10/si_programming_guide_v2.pdf > 2.9.4 WRITE_DATA, DST_ADDR_LO field, when destination is memory the bits > range is [31:2] for 32 bit addresses > and [31:3] for 64 bit addresses) Those 2 bits are always 0 in this case > anyway. Thanks for the confirmation :) > > Thanks, > Andrey > > > --- > > tests/amdgpu/basic_tests.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c > > index 0f75e8961bb7c0c9ecd9..6ee0aa3b044aeffc6adf 100644 > > --- a/tests/amdgpu/basic_tests.c > > +++ b/tests/amdgpu/basic_tests.c > > @@ -1608,7 +1608,7 @@ static void amdgpu_sync_dependency_test(void) > > j = i; > > ptr[i++] = PACKET3(PACKET3_WRITE_DATA, 3); > > ptr[i++] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; > > - ptr[i++] = 0xfffffffc & ib_result_mc_address + DATA_OFFSET * 4; > > + ptr[i++] = 0xfffffffc & (ib_result_mc_address + DATA_OFFSET * 4); > > ptr[i++] = (0xffffffff00000000 & (ib_result_mc_address + DATA_OFFSET * 4)) >> 32; > > ptr[i++] = 99; > _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
