2011/11/5 Alex Deucher <alexdeucher@xxxxxxxxx>: > On Fri, Nov 4, 2011 at 10:26 AM, Chen Jie <chenj@xxxxxxxxxx> wrote: >> Hi all, >> >> I tried to create/pin ring BO in VRAM instead of GTT to debug some >> ring-related problems. After I did this, it rendered a black screen in >> X (on a X86 RS780E board), but radeon.test passed. >> 'ps aux' shows X uninterruptibly sleeps on radeon. >> >> Curious why this does not work? > > The tricky part is dealing with the HDP cache. Access to vram via the > PCI FB BAR goes through the HDP cache, you have to make sure it's > flushed properly before the GPU starts using the data there. To flush > it, either read back from vram, or write 1 to the > HDP_MEM_COHERENCY_FLUSH_CNTL register. We generally don't recommend > putting the ring in vram. Get it, thanks. After add HDP cache flush in r600_cp_commit(), it works fine. Regards, -- Chen Jie _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/dri-devel
