On 11/2/11 12:20 PM, Jesse Barnes wrote:
@@ -766,10 +766,10 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
continue;
intel_dp = enc_to_intel_dp(encoder);
- if (intel_dp->base.type == INTEL_OUTPUT_DISPLAYPORT) {
+ if (intel_dp->base.type == INTEL_OUTPUT_DISPLAYPORT || is_pch_edp(intel_dp)) {
lane_count = intel_dp->lane_count;
break;
- } else if (is_edp(intel_dp)) {
+ } else if (is_cpu_edp(intel_dp)) {
lane_count = dev_priv->edp.lanes;
break;
}
I guess this means we can't trust the BIOS settings for PCH eDP?
Given the choice of trusting DPCD or the VBT, I'd definitely prefer DPCD.
- ajax
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