On 09/29/2017 09:32 AM, Marek Szyprowski wrote: > From: Andrzej Pietrasiewicz <andrzej.p@xxxxxxxxxxx> > > TOP "aclk400_mscl" clock should be kept enabled all the time to allow > proper access to power management control for MSC power domain and > devices that are a part of it. This change is required for scaler to > work properly after domain power on/off sequence. > > Fixes: 318fa46cc60d ("clk/samsung: exynos542x: mark some clocks as critical") > Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@xxxxxxxxxxx> > Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx> Applied, thanks. _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel