This patch set is introduced to support a driver we are developing for our new Video Framebuffer DMA IP, a DMA device that is "video format aware". Clients need only specify memory layout information for a single plane (i.e. luma) and then provide a video format code (e.g. YUV420) which will permit for intelligent reads or writes (depending on the IP configuration) to host memory with only a minimal set of video memory configuration data. The IP supports a variety of 8-bit and 10-bit video formats, some of which are not represented in the current DRM user api or framework. This patch set introduces these needed video format codes and updates the DRM framework with the metadata required. We've endeavored to follow the existing DRM conventions for the new fourcc codes and, where no comparable examples were present (e.g. Y8 and Y10), we adopted the V4L2 conventions. The DMA driver requiring these updates is not being submitted as part of this patch set as it is still undergoing final development. We are submitting this patch series for review and comment with regard to ensuring we haven't missed any required framework updates and/or in regards to the choices we've made to the fourcc string values. Jeffrey Mouroux (2): uapi: drm: Add fourcc codes needed by Xilinx Video IP drm: Update framework with new video formats drivers/gpu/drm/drm_fourcc.c | 7 +++++++ include/uapi/drm/drm_fourcc.h | 9 +++++++++ 2 files changed, 16 insertions(+) -- 1.9.1 _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
