[radeon-alex:amd-staging-drm-next 42/808] drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/vega10_hwmgr.c:325:4: error: 'FEATURE_VOLTAGE_CONTROLLER_BIT' undeclared

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tree:   git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next
head:   d665c6b2fca322b5ccf836cfc2f8ac10260cf2d8
commit: 3272cfcf73b9e0932a037ed711347ce9dc97c16e [42/808] drm/amd/powerplay: export ACG related smu message for vega10
config: x86_64-randconfig-it0-07302031 (attached as .config)
compiler: gcc-4.9 (Debian 4.9.4-2) 4.9.4
reproduce:
        git checkout 3272cfcf73b9e0932a037ed711347ce9dc97c16e
        # save the attached .config to linux build tree
        make ARCH=x86_64 

Note: the radeon-alex/amd-staging-drm-next HEAD d665c6b2fca322b5ccf836cfc2f8ac10260cf2d8 builds fine.
      It only hurts bisectibility.

All errors (new ones prefixed by >>):

   drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/vega10_hwmgr.c: In function 'vega10_init_dpm_defaults':
>> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/vega10_hwmgr.c:325:4: error: 'FEATURE_VOLTAGE_CONTROLLER_BIT' undeclared (first use in this function)
       FEATURE_VOLTAGE_CONTROLLER_BIT;
       ^
   drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/vega10_hwmgr.c:325:4: note: each undeclared identifier is reported only once for each function it appears in

vim +/FEATURE_VOLTAGE_CONTROLLER_BIT +325 drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/vega10_hwmgr.c

f83a9991 Eric Huang 2017-03-06  257  
f83a9991 Eric Huang 2017-03-06  258  static void vega10_init_dpm_defaults(struct pp_hwmgr *hwmgr)
f83a9991 Eric Huang 2017-03-06  259  {
f83a9991 Eric Huang 2017-03-06  260  	struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
f83a9991 Eric Huang 2017-03-06  261  	int i;
f83a9991 Eric Huang 2017-03-06  262  
f83a9991 Eric Huang 2017-03-06  263  	vega10_initialize_power_tune_defaults(hwmgr);
f83a9991 Eric Huang 2017-03-06  264  
f83a9991 Eric Huang 2017-03-06  265  	for (i = 0; i < GNLD_FEATURES_MAX; i++) {
f83a9991 Eric Huang 2017-03-06  266  		data->smu_features[i].smu_feature_id = 0xffff;
f83a9991 Eric Huang 2017-03-06  267  		data->smu_features[i].smu_feature_bitmap = 1 << i;
f83a9991 Eric Huang 2017-03-06  268  		data->smu_features[i].enabled = false;
f83a9991 Eric Huang 2017-03-06  269  		data->smu_features[i].supported = false;
f83a9991 Eric Huang 2017-03-06  270  	}
f83a9991 Eric Huang 2017-03-06  271  
f83a9991 Eric Huang 2017-03-06  272  	data->smu_features[GNLD_DPM_PREFETCHER].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  273  			FEATURE_DPM_PREFETCHER_BIT;
f83a9991 Eric Huang 2017-03-06  274  	data->smu_features[GNLD_DPM_GFXCLK].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  275  			FEATURE_DPM_GFXCLK_BIT;
f83a9991 Eric Huang 2017-03-06  276  	data->smu_features[GNLD_DPM_UCLK].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  277  			FEATURE_DPM_UCLK_BIT;
f83a9991 Eric Huang 2017-03-06  278  	data->smu_features[GNLD_DPM_SOCCLK].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  279  			FEATURE_DPM_SOCCLK_BIT;
f83a9991 Eric Huang 2017-03-06  280  	data->smu_features[GNLD_DPM_UVD].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  281  			FEATURE_DPM_UVD_BIT;
f83a9991 Eric Huang 2017-03-06  282  	data->smu_features[GNLD_DPM_VCE].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  283  			FEATURE_DPM_VCE_BIT;
f83a9991 Eric Huang 2017-03-06  284  	data->smu_features[GNLD_DPM_MP0CLK].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  285  			FEATURE_DPM_MP0CLK_BIT;
f83a9991 Eric Huang 2017-03-06  286  	data->smu_features[GNLD_DPM_LINK].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  287  			FEATURE_DPM_LINK_BIT;
f83a9991 Eric Huang 2017-03-06  288  	data->smu_features[GNLD_DPM_DCEFCLK].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  289  			FEATURE_DPM_DCEFCLK_BIT;
f83a9991 Eric Huang 2017-03-06  290  	data->smu_features[GNLD_ULV].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  291  			FEATURE_ULV_BIT;
f83a9991 Eric Huang 2017-03-06  292  	data->smu_features[GNLD_AVFS].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  293  			FEATURE_AVFS_BIT;
f83a9991 Eric Huang 2017-03-06  294  	data->smu_features[GNLD_DS_GFXCLK].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  295  			FEATURE_DS_GFXCLK_BIT;
f83a9991 Eric Huang 2017-03-06  296  	data->smu_features[GNLD_DS_SOCCLK].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  297  			FEATURE_DS_SOCCLK_BIT;
f83a9991 Eric Huang 2017-03-06  298  	data->smu_features[GNLD_DS_LCLK].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  299  			FEATURE_DS_LCLK_BIT;
f83a9991 Eric Huang 2017-03-06  300  	data->smu_features[GNLD_PPT].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  301  			FEATURE_PPT_BIT;
f83a9991 Eric Huang 2017-03-06  302  	data->smu_features[GNLD_TDC].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  303  			FEATURE_TDC_BIT;
f83a9991 Eric Huang 2017-03-06  304  	data->smu_features[GNLD_THERMAL].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  305  			FEATURE_THERMAL_BIT;
f83a9991 Eric Huang 2017-03-06  306  	data->smu_features[GNLD_GFX_PER_CU_CG].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  307  			FEATURE_GFX_PER_CU_CG_BIT;
f83a9991 Eric Huang 2017-03-06  308  	data->smu_features[GNLD_RM].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  309  			FEATURE_RM_BIT;
f83a9991 Eric Huang 2017-03-06  310  	data->smu_features[GNLD_DS_DCEFCLK].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  311  			FEATURE_DS_DCEFCLK_BIT;
f83a9991 Eric Huang 2017-03-06  312  	data->smu_features[GNLD_ACDC].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  313  			FEATURE_ACDC_BIT;
f83a9991 Eric Huang 2017-03-06  314  	data->smu_features[GNLD_VR0HOT].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  315  			FEATURE_VR0HOT_BIT;
f83a9991 Eric Huang 2017-03-06  316  	data->smu_features[GNLD_VR1HOT].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  317  			FEATURE_VR1HOT_BIT;
f83a9991 Eric Huang 2017-03-06  318  	data->smu_features[GNLD_FW_CTF].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  319  			FEATURE_FW_CTF_BIT;
f83a9991 Eric Huang 2017-03-06  320  	data->smu_features[GNLD_LED_DISPLAY].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  321  			FEATURE_LED_DISPLAY_BIT;
f83a9991 Eric Huang 2017-03-06  322  	data->smu_features[GNLD_FAN_CONTROL].smu_feature_id =
f83a9991 Eric Huang 2017-03-06  323  			FEATURE_FAN_CONTROL_BIT;
f83a9991 Eric Huang 2017-03-06  324  	data->smu_features[GNLD_VOLTAGE_CONTROLLER].smu_feature_id =
f83a9991 Eric Huang 2017-03-06 @325  			FEATURE_VOLTAGE_CONTROLLER_BIT;
f83a9991 Eric Huang 2017-03-06  326  
f83a9991 Eric Huang 2017-03-06  327  	if (!data->registry_data.prefetcher_dpm_key_disabled)
f83a9991 Eric Huang 2017-03-06  328  		data->smu_features[GNLD_DPM_PREFETCHER].supported = true;
f83a9991 Eric Huang 2017-03-06  329  
f83a9991 Eric Huang 2017-03-06  330  	if (!data->registry_data.sclk_dpm_key_disabled)
f83a9991 Eric Huang 2017-03-06  331  		data->smu_features[GNLD_DPM_GFXCLK].supported = true;
f83a9991 Eric Huang 2017-03-06  332  
f83a9991 Eric Huang 2017-03-06  333  	if (!data->registry_data.mclk_dpm_key_disabled)
f83a9991 Eric Huang 2017-03-06  334  		data->smu_features[GNLD_DPM_UCLK].supported = true;
f83a9991 Eric Huang 2017-03-06  335  
f83a9991 Eric Huang 2017-03-06  336  	if (!data->registry_data.socclk_dpm_key_disabled)
f83a9991 Eric Huang 2017-03-06  337  		data->smu_features[GNLD_DPM_SOCCLK].supported = true;
f83a9991 Eric Huang 2017-03-06  338  
f83a9991 Eric Huang 2017-03-06  339  	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
f83a9991 Eric Huang 2017-03-06  340  			PHM_PlatformCaps_UVDDPM))
f83a9991 Eric Huang 2017-03-06  341  		data->smu_features[GNLD_DPM_UVD].supported = true;
f83a9991 Eric Huang 2017-03-06  342  
f83a9991 Eric Huang 2017-03-06  343  	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
f83a9991 Eric Huang 2017-03-06  344  			PHM_PlatformCaps_VCEDPM))
f83a9991 Eric Huang 2017-03-06  345  		data->smu_features[GNLD_DPM_VCE].supported = true;
f83a9991 Eric Huang 2017-03-06  346  
f83a9991 Eric Huang 2017-03-06  347  	if (!data->registry_data.pcie_dpm_key_disabled)
f83a9991 Eric Huang 2017-03-06  348  		data->smu_features[GNLD_DPM_LINK].supported = true;
f83a9991 Eric Huang 2017-03-06  349  
f83a9991 Eric Huang 2017-03-06  350  	if (!data->registry_data.dcefclk_dpm_key_disabled)
f83a9991 Eric Huang 2017-03-06  351  		data->smu_features[GNLD_DPM_DCEFCLK].supported = true;
f83a9991 Eric Huang 2017-03-06  352  
f83a9991 Eric Huang 2017-03-06  353  	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
f83a9991 Eric Huang 2017-03-06  354  			PHM_PlatformCaps_SclkDeepSleep) &&
f83a9991 Eric Huang 2017-03-06  355  			data->registry_data.sclk_deep_sleep_support) {
f83a9991 Eric Huang 2017-03-06  356  		data->smu_features[GNLD_DS_GFXCLK].supported = true;
f83a9991 Eric Huang 2017-03-06  357  		data->smu_features[GNLD_DS_SOCCLK].supported = true;
f83a9991 Eric Huang 2017-03-06  358  		data->smu_features[GNLD_DS_LCLK].supported = true;
df057e02 Rex Zhu    2017-05-27  359  		data->smu_features[GNLD_DS_DCEFCLK].supported = true;
f83a9991 Eric Huang 2017-03-06  360  	}
f83a9991 Eric Huang 2017-03-06  361  
f83a9991 Eric Huang 2017-03-06  362  	if (data->registry_data.enable_pkg_pwr_tracking_feature)
f83a9991 Eric Huang 2017-03-06  363  		data->smu_features[GNLD_PPT].supported = true;
f83a9991 Eric Huang 2017-03-06  364  
f83a9991 Eric Huang 2017-03-06  365  	if (data->registry_data.enable_tdc_limit_feature)
f83a9991 Eric Huang 2017-03-06  366  		data->smu_features[GNLD_TDC].supported = true;
f83a9991 Eric Huang 2017-03-06  367  
f83a9991 Eric Huang 2017-03-06  368  	if (data->registry_data.thermal_support)
f83a9991 Eric Huang 2017-03-06  369  		data->smu_features[GNLD_THERMAL].supported = true;
f83a9991 Eric Huang 2017-03-06  370  
f83a9991 Eric Huang 2017-03-06  371  	if (data->registry_data.fan_control_support)
f83a9991 Eric Huang 2017-03-06  372  		data->smu_features[GNLD_FAN_CONTROL].supported = true;
f83a9991 Eric Huang 2017-03-06  373  
f83a9991 Eric Huang 2017-03-06  374  	if (data->registry_data.fw_ctf_enabled)
f83a9991 Eric Huang 2017-03-06  375  		data->smu_features[GNLD_FW_CTF].supported = true;
f83a9991 Eric Huang 2017-03-06  376  
f83a9991 Eric Huang 2017-03-06  377  	if (data->registry_data.avfs_support)
f83a9991 Eric Huang 2017-03-06  378  		data->smu_features[GNLD_AVFS].supported = true;
f83a9991 Eric Huang 2017-03-06  379  
f83a9991 Eric Huang 2017-03-06  380  	if (data->registry_data.led_dpm_enabled)
f83a9991 Eric Huang 2017-03-06  381  		data->smu_features[GNLD_LED_DISPLAY].supported = true;
f83a9991 Eric Huang 2017-03-06  382  
f83a9991 Eric Huang 2017-03-06  383  	if (data->registry_data.vr1hot_enabled)
f83a9991 Eric Huang 2017-03-06  384  		data->smu_features[GNLD_VR1HOT].supported = true;
f83a9991 Eric Huang 2017-03-06  385  
f83a9991 Eric Huang 2017-03-06  386  	if (data->registry_data.vr0hot_enabled)
f83a9991 Eric Huang 2017-03-06  387  		data->smu_features[GNLD_VR0HOT].supported = true;
f83a9991 Eric Huang 2017-03-06  388  

:::::: The code at line 325 was first introduced by commit
:::::: f83a9991648bb4023a53104db699e99305890d51 drm/amd/powerplay: add Vega10 powerplay support (v5)

:::::: TO: Eric Huang <JinHuiEric.Huang@xxxxxxx>
:::::: CC: Alex Deucher <alexander.deucher@xxxxxxx>

---
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