On 02.06.2017 17:12, Alex Deucher wrote: > On Fri, Jun 2, 2017 at 3:35 AM, Florian Echtler <floe@xxxxxxxxxxxxxx> wrote: >> >> [ 166.853787] [drm:radeon_dp_link_train_cr] clock recovery at voltage 0 >> pre-emphasis 0 >> [ 166.853788] [drm:drm_detect_monitor_audio] Monitor has basic audio support >> [ 166.855953] [drm:radeon_dp_link_train_ce] channel eq at voltage 0 pre-emphasis 0 > > Yes, the link training appears to complete fine. I guess it's > something to do with the proprietary mux or backlight controls. OK, so back to square... well, not one, but definitely back to the registers (SMC and GPU). As mentioned, the diff for the GPU registers before/after suspend is huge, there's 117 register values that have changed. I assume that most of them are actually internal frame pointers, but which ones? I tried to find some of that information in drivers/gpu/drm/radeon/, but quickly got lost :-/ Regarding the SMC, there's actually only one key that consistently seems to have a different value whether the display is on or off: --- blank 2017-05-05 08:40:53.694565045 +0200 +++ non_blank 2017-05-05 08:40:53.702565066 +0200 @@ -143,7 +143,7 @@ MSWR [ui8 ] 0 (bytes 00) MVBO [hex_] (bytes ff ff) MVDC [bin_] (bytes 00) - MVDS [bin_] (bytes 08) + MVDS [bin_] (bytes 0a) MVE1 [si8 ] (bytes 0d) MVE5 [si8 ] (bytes 0b) MVHR [flag] (bytes 01) However, even with my modified SmcDumpKeys.c which I can use to enable TDM, I cannot write to that key. Since other MV__ keys control the display, too, it would make sense that that is related to the display state, but it seems to be a read-only key :-/ Running out of ideas again... any suggestions? Best, Florian -- SENT FROM MY DEC VT50 TERMINAL
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