Comment # 4
on bug 100222
from Alex Deucher
(In reply to Mauro Santos from comment #3) > Build fails after applying patch 1 followed by patch 2 with: > > > drivers/gpu/drm/radeon/si_dpm.c: In function ‘si_get_vce_clock_voltage’: > drivers/gpu/drm/radeon/si_dpm.c:2977:4: error: ‘else’ without a previous ‘if’ > } else if (rdev->family == CHIP_OLAND) { > ^~~~ > drivers/gpu/drm/radeon/si_dpm.c:2985:4: error: ‘max_sclk’ undeclared (first > use in this function) > max_sclk = 75000; > ^~~~~~~~ > drivers/gpu/drm/radeon/si_dpm.c:2985:4: note: each undeclared identifier is > reported only once for each function it appears in > > > The patch changes things inside the si_get_vce_clock_voltage function but I > suppose the changes should be made a few lines bellow that to the > si_apply_state_adjust_rules function after the quirks for pitcairn and > hainan right? The patch modifies si_apply_state_adjust_rules, I guess it's not applying cleanly to your kernel. > > Another thing that I'm curious about, any guesses as to why the card needs > the maximum core clock limited to 750MHz on linux but seems to work fine on > windows 10 at 875MHz? I've tried it on Windows 10 (all drivers downloaded > via windows update) with unigine heaven + cpu-z to monitor the frequencies > and it seems to go along happily with 875MHz core and 900MHz memory clocks. There is still some bug in the driver that prevents the higher clocks for working stable on your card. We fixed some issues and the driver was working on the hardware samples we had in house (which is why I removed the workaround), but apparently there are still some variants that are not working correctly.
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