Re: [PATCH 4/5] drm/amd/display: Add HDMI Stereo 3D (DC) support

[Jeffrey Smith <whydoubt@xxxxxxxxx>]

I have easy access to an LG 3D television, though I do not have model information handy at the moment.  This is the only display I have tested on so far.

I have tested all three modes, and in each case the signal is recognized as 3D (the TV pops up a message to this effect), and the content is displayed as intended.

BTW, regarding timing_3d_format I am not entirely clear on the difference between hardware and software varieties (e.g. _HW_FRAME_PACKING vs. _SW_FRAME_PACKING) but my inclination was that the software variety is what I was working with.

On Wed, Mar 1, 2017 at 5:13 PM, Harry Wentland <harry.wentland@xxxxxxx> wrote:

On 2017-02-24 07:14 PM, Jeff Smith wrote:

Signed-off-by: Jeff Smith <whydoubt@xxxxxxxxx>
---
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_types.c    | 32 ++++++++++++++++------
 .../display/dc/dce110/dce110_timing_generator.c    |  4 ---
 2 files changed, 23 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
index 3912dc8..eda813e 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
@@ -649,8 +649,7 @@ static void update_stream_scaling_settings(
                return;

        /* Full screen scaling by default */
-       src.width = mode->hdisplay;
-       src.height = mode->vdisplay;
+       drm_crtc_get_hv_timing(mode, &src.width, &src.height);
        dst.width = stream->timing.h_addressable;
        dst.height = stream->timing.v_addressable;

@@ -853,7 +852,22 @@ static void fill_stream_properties_from_drm_display_mode(
        else
                timing_out->pixel_encoding = PIXEL_ENCODING_RGB;

-       timing_out->timing_3d_format = TIMING_3D_FORMAT_NONE;
+       switch (mode_in->flags & DRM_MODE_FLAG_3D_MASK) {
+       case DRM_MODE_FLAG_3D_FRAME_PACKING:
+               timing_out->timing_3d_format = TIMING_3D_FORMAT_SW_FRAME_PACKING;
+               break;
+       case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
+               timing_out->timing_3d_format = TIMING_3D_FORMAT_TB_SW_PACKED;
+               break;
+       case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
+               timing_out->timing_3d_format = TIMING_3D_FORMAT_SBS_SW_PACKED;
+               break;
+       case DRM_MODE_FLAG_3D_NONE:
+       default:
+               timing_out->timing_3d_format = TIMING_3D_FORMAT_NONE;
+               break;
+       }
+

Are these tested and if so on which displays? Even though we have some of this code in place we haven't tested any of it and don't necessarily expect it to work.

Harry

        timing_out->display_color_depth = convert_color_depth_from_display_info(
                        connector);
        timing_out->scan_type = SCANNING_TYPE_NODATA;
@@ -1028,6 +1042,7 @@ static struct dc_stream *create_stream_for_sink(
                                dm_state->scaling != RMX_OFF);
        }

+       drm_mode_set_crtcinfo(&mode, CRTC_STEREO_DOUBLE_ONLY);
        fill_stream_properties_from_drm_display_mode(stream,
                        &mode, &aconnector->base);
        update_stream_scaling_settings(&mode, dm_state, stream);
@@ -1558,13 +1573,12 @@ int amdgpu_dm_connector_mode_valid(
                goto stream_create_fail;
        }

-       drm_mode_set_crtcinfo(mode, 0);
+       drm_mode_set_crtcinfo(mode, CRTC_STEREO_DOUBLE);
        fill_stream_properties_from_drm_display_mode(stream, mode, connector);

        val_set.stream = stream;
        val_set.surface_count = 0;
-       stream->src.width = mode->hdisplay;
-       stream->src.height = mode->vdisplay;
+       drm_crtc_get_hv_timing(mode, &stream->src.width, &stream->src.height);
        stream->dst = stream->src;

        if (dc_validate_resources(adev->dm.dc, &val_set, 1))
@@ -1793,14 +1807,13 @@ int dm_create_validation_set_for_connector(struct drm_connector *connector,
                return result;
        }

-       drm_mode_set_crtcinfo(mode, 0);
+       drm_mode_set_crtcinfo(mode, CRTC_STEREO_DOUBLE);

        fill_stream_properties_from_drm_display_mode(stream, mode, connector);

        val_set->stream = stream;

-       stream->src.width = mode->hdisplay;
-       stream->src.height = mode->vdisplay;
+       drm_crtc_get_hv_timing(mode, &stream->src.width, &stream->src.height);
        stream->dst = stream->src;

        return MODE_OK;
@@ -2073,6 +2086,7 @@ void amdgpu_dm_connector_init_helper(
        aconnector->dc_link = link;
        aconnector->base.interlace_allowed = true;
        aconnector->base.doublescan_allowed = true;
+       aconnector->base.stereo_allowed = true;
        aconnector->base.dpms = DRM_MODE_DPMS_OFF;
        aconnector->hpd.hpd = AMDGPU_HPD_NONE; /* not used */

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
index f4b8576..fa06816 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
@@ -1113,10 +1113,6 @@ bool dce110_timing_generator_validate_timing(
        if (!timing)
                return false;

-       /* Currently we don't support 3D, so block all 3D timings */
-       if (timing->timing_3d_format != TIMING_3D_FORMAT_NONE)
-               return false;
-
        /* Temporarily blocking interlacing mode until it's supported */
        if (timing->flags.INTERLACE == 1)
                return false;

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