Use a TTBR1 pagetable for the GPU IOMMU domain and map all
the GPU kernel side buffer objects into that range. This
will make it easier to switch out TTBR0 for per-process
pagetables.
Signed-off-by: Jordan Crouse <jcrouse@xxxxxxxxxxxxxx>
---
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 18 ++++++++++++++++--
drivers/gpu/drm/msm/msm_iommu.c | 7 +++++++
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index b41bd88..d7864ac 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -418,8 +418,22 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
adreno_gpu_config.ioname = "kgsl_3d0_reg_memory";
adreno_gpu_config.irqname = "kgsl_3d0_irq";
- adreno_gpu_config.va_start = SZ_16M;
- adreno_gpu_config.va_end = 0xffffffff;
+ if (adreno_gpu->revn >= 500) {
+ /*
+ * By default map all A5XX buffers into the TTBR1 va space.
+ * If per-instance pagetables are used then they will
+ * use their own address space and the default domain will only
+ * be used for kernel buffers. If per-instance pagetables aren't
+ * enabled then we'll end up using the TTBR1 range as the
+ * default global pagetable but that's okay because we have
+ * plenty of room.
+ */
+ adreno_gpu_config.va_start = 0xfffffff800000000ULL;
+ adreno_gpu_config.va_end = 0xfffffff8ffffffffULL;
+ } else {
+ adreno_gpu_config.va_start = SZ_16M;
+ adreno_gpu_config.va_end = 0xffffffff;
+ }
adreno_gpu_config.nr_rings = nr_rings;
diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c
index c1bfc92..cc82410 100644
--- a/drivers/gpu/drm/msm/msm_iommu.c
+++ b/drivers/gpu/drm/msm/msm_iommu.c
@@ -83,6 +83,13 @@ static int msm_iommu_v2_attach(struct msm_mmu *mmu, const char * const *names,
int cnt)
{
struct msm_iommu *iommu = to_msm_iommu(mmu);
+ int val = 1;
+
+ /* Use TTBR1 if it exists */
+ /* FIXME: This should only be for GPU and in theory only for A5XX */
+
+ iommu_domain_set_attr(iommu->domain, DOMAIN_ATTR_ENABLE_TTBR1,
+ &val);
return iommu_attach_device(iommu->domain, mmu->dev);
}
--
1.9.1
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