Re: drm: panel-simple: Problems to use Seiko 43WVF1G panel and DRM_MXS driver on the i.MX6SX SabreSD.

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On 02/01/2017 05:52 PM, Thierry Reding wrote:
> On Wed, Feb 01, 2017 at 02:04:29PM -0200, Breno Matheus Lima wrote:
>> Hi,
>>
>> I'm trying to use the Seiko 43WVF1G panel (Datasheet link:
>> http://www.glyn.de/data/glyn/media/doc/43wvf1g-0.pdf) and the DRM_MXS
>> driver on
>> the i.MX6SX SabreSD. Applying the patch below removes the old
>> timing configuration on the dtsi and adds it to the panel-simple.c
>> I can get the display working, but the image is out of place. Another point
>> to
>> note is that it's necessary to set the reg_lcd_3v3 to regulator-always-on
>> otherwise the gpio3 27 does not get enabled.
>>
>> The main two problems that I'm having at the moment are:
>>
>> - Gpio3 27 is not being set by the driver, function
>> panel_simple_prepare(struct drm_panel *panel) is not being called.
> 
> From a quick look the mxsfb driver is not fully implementing panel
> handling. It should really call drm_panel_prepare() and
> drm_panel_enable() while switching on the display pipeline and
> drm_panel_disable(), followed by drm_panel_unprepare() while switching
> off the display pipeline.
> 
> That should take care of setting that GPIO.
> 
>> - The image is displaced even when using the same timing values in
>> the datasheet.
>>
>> I would like to know if I'm doing something wrong on my dtsi, or if
>> something
>> is missing on the panel-simple.c. I would appreciate any help.
> 
> I was going to say that you could try and add debug output to the driver
> to see if the same values end up being programmed into the CRTC, but the
> driver currently doesn't seem to work with the existing bindings either,
> it relies entirely on DRM panel to get the modes, but evidently there is
> a lack of proper support for that.
> 
> I wonder how this has been tested in the first place. Maybe Marek can
> help answer these questions.

I didn't use the simple-panel stuff, I used a custom panel driver, but
didn't post that one yet. It's still in the pipeline.

-- 
Best regards,
Marek Vasut
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