On Tue, Jul 26, 2011 at 5:28 PM, <j.glisse@xxxxxxxxx> wrote:
> From: Jerome Glisse <jglisse@xxxxxxxxxx>
>
> Some CP interrupt were left enabled when disabling interrupt.
>
Is there a specific issue this fixes? The bits are not interrupt
sources per se but rather are related to the internal state of the
interrupt controller and should always be enabled.
Alex
> Signed-off-by: Jerome Glisse <jglisse@xxxxxxxxxx>
> ---
> drivers/gpu/drm/radeon/evergreen.c | 2 +-
> drivers/gpu/drm/radeon/r600.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
> index 14dce9f..852565d 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -2434,7 +2434,7 @@ void evergreen_disable_interrupt_state(struct radeon_device *rdev)
> {
> u32 tmp;
>
> - WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE);
> + WREG32(CP_INT_CNTL, 0);
> WREG32(GRBM_INT_CNTL, 0);
> WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
> WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
> index aa5571b..d2c74e7 100644
> --- a/drivers/gpu/drm/radeon/r600.c
> +++ b/drivers/gpu/drm/radeon/r600.c
> @@ -2900,7 +2900,7 @@ static void r600_disable_interrupt_state(struct radeon_device *rdev)
> {
> u32 tmp;
>
> - WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE);
> + WREG32(CP_INT_CNTL, 0);
> WREG32(GRBM_INT_CNTL, 0);
> WREG32(DxMODE_INT_MASK, 0);
> WREG32(D1GRPH_INTERRUPT_CONTROL, 0);
> --
> 1.7.3.2
>
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