Andy, Could you queue this patch for 4.11? On 01/17/2017 07:56 AM, Andy Gross wrote: > This patch adds a set remote state SCM API. This will be used by the > Venus and GPU subsystems to set state on the remote processors. > > This work was based on two patch sets by Jordan Crouse and Stanimir > Varbanov. > > Signed-off-by: Andy Gross <andy.gross@xxxxxxxxxx> > --- > drivers/firmware/qcom_scm-32.c | 18 ++++++++++++++++++ > drivers/firmware/qcom_scm-64.c | 16 ++++++++++++++++ > drivers/firmware/qcom_scm.c | 6 ++++++ > drivers/firmware/qcom_scm.h | 2 ++ > include/linux/qcom_scm.h | 4 +++- > 5 files changed, 45 insertions(+), 1 deletion(-) > > diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c > index c6aeedb..8ad226c 100644 > --- a/drivers/firmware/qcom_scm-32.c > +++ b/drivers/firmware/qcom_scm-32.c > @@ -560,3 +560,21 @@ int __qcom_scm_pas_mss_reset(struct device *dev, bool reset) > > return ret ? : le32_to_cpu(out); > } > + > +int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id) > +{ > + struct { > + __le32 state; > + __le32 id; > + } req; > + __le32 scm_ret = 0; > + int ret; > + > + req.state = cpu_to_le32(state); > + req.id = cpu_to_le32(id); > + > + ret = qcom_scm_call(dev, QCOM_SCM_SVC_BOOT, QCOM_SCM_SET_REMOTE_STATE, > + &req, sizeof(req), &scm_ret, sizeof(scm_ret)); > + > + return ret ? : le32_to_cpu(scm_ret); > +} > diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c > index 4a0f5ea..4b220ab 100644 > --- a/drivers/firmware/qcom_scm-64.c > +++ b/drivers/firmware/qcom_scm-64.c > @@ -358,3 +358,19 @@ int __qcom_scm_pas_mss_reset(struct device *dev, bool reset) > > return ret ? : res.a1; > } > + > +int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id) > +{ > + struct qcom_scm_desc desc = {0}; > + struct arm_smccc_res res; > + int ret; > + > + desc.args[0] = state; > + desc.args[1] = id; > + desc.arginfo = QCOM_SCM_ARGS(2); > + > + ret = qcom_scm_call(dev, QCOM_SCM_SVC_BOOT, QCOM_SCM_SET_REMOTE_STATE, > + &desc, &res); > + > + return ret ? : res.a1; > +} > diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c > index 65d0d9d..d987bcc 100644 > --- a/drivers/firmware/qcom_scm.c > +++ b/drivers/firmware/qcom_scm.c > @@ -324,6 +324,12 @@ bool qcom_scm_is_available(void) > } > EXPORT_SYMBOL(qcom_scm_is_available); > > +int qcom_scm_set_remote_state(u32 state, u32 id) > +{ > + return __qcom_scm_set_remote_state(__scm->dev, state, id); > +} > +EXPORT_SYMBOL(qcom_scm_set_remote_state); > + > static int qcom_scm_probe(struct platform_device *pdev) > { > struct qcom_scm *scm; > diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h > index 3584b00..6a0f154 100644 > --- a/drivers/firmware/qcom_scm.h > +++ b/drivers/firmware/qcom_scm.h > @@ -15,6 +15,8 @@ > #define QCOM_SCM_SVC_BOOT 0x1 > #define QCOM_SCM_BOOT_ADDR 0x1 > #define QCOM_SCM_BOOT_ADDR_MC 0x11 > +#define QCOM_SCM_SET_REMOTE_STATE 0xa > +extern int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id); > > #define QCOM_SCM_FLAG_HLOS 0x01 > #define QCOM_SCM_FLAG_COLDBOOT_MC 0x02 > diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h > index 7e004fb..d32f6f1 100644 > --- a/include/linux/qcom_scm.h > +++ b/include/linux/qcom_scm.h > @@ -39,6 +39,7 @@ extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, > extern int qcom_scm_pas_shutdown(u32 peripheral); > extern void qcom_scm_cpu_power_down(u32 flags); > extern u32 qcom_scm_get_version(void); > +extern int qcom_scm_set_remote_state(u32 state, u32 id); > #else > static inline > int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus) > @@ -64,6 +65,7 @@ static inline int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, > static inline int qcom_scm_pas_shutdown(u32 peripheral) { return -ENODEV; } > static inline void qcom_scm_cpu_power_down(u32 flags) {} > static inline u32 qcom_scm_get_version(void) { return 0; } > +static inline u32 > +qcom_scm_set_remote_state(u32 state,u32 id) { return -ENODEV; } > #endif > - > #endif > _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel