Hello:
I meet a problem when I want to add support for a lg,lp079qx1-sp0v eDP
panel at firefly release rk3288 platform. I could hardly make the eDP
work both on firefly release and firefly reload. Does you have any idea
about that?
[ 11.136586] i2c i2c-6: of_i2c: modalias failure on /dp@ff970000/ports
[ 11.143127] i2c i2c-6: Failed to create I2C device for /dp@ff970000/ports
[ 11.150288] rockchip-drm display-subsystem: bound ff970000.dp (ops
rockchip_dp_component_ops [analogix_dp_rockchip])
[ 11.160944] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 11.167645] [drm] No driver support for vblank timestamp query.
[ OK ] Started LSB: Load kernel modules needed to enable cpufreq scaling.
[ 11.205908] rockchip-drm display-subsystem: fb0: frame buffer device
[ 11.221525] [drm] Initialized rockchip 1.0.0 20140818 for
display-subsystem on minor 0
[ 11.275427] rockchip-dp ff970000.dp: AUX CH command reply failed!
[ OK ] Created slice system-systemd\x2dbacklight.slice.
Starting Load/Save Screen Backlight...htness of
backlight:backlight...
Starting LSB: set CPUFreq kernel parameters...
[ 11.450557] rockchip-dp ff970000.dp: Rx Max Link Rate is abnormal :20 !
[ 11.457274] rockchip-dp ff970000.dp: Rx Max Lane count is abnormal :0 !
[ 11.480023] rockchip-dp ff970000.dp: AUX CH command reply failed!
[ 11.532742] rockchip-dp ff970000.dp: AUX CH command reply failed!
[ 11.595626] rockchip-dp ff970000.dp: LT link start failed!
[ 11.601167] rockchip-dp ff970000.dp: eDP link training failed (-121)
[ OK ] Started Load/Save Screen Backlight Brightness of
backlight:backlight.
[ 11.622300] rockchip-dp ff970000.dp: AUX CH command reply failed!
[ 11.637980] rockchip-dp ff970000.dp: AUX CH command reply failed!
[ 11.667878] rockchip-dp ff970000.dp: AUX CH command reply failed!
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