Re: [PATCH] drm: add fourcc codes for 16bit R and GR

[Rainer Hochecker <fernetmenta@xxxxxxx>]

I chose GR16 because that matches with Mesa texture formats. Unfortunately

RG16 is already taken by DRM_FORMAT_RGB565
So GR32 / RG32 might be better. All other codes in fourcc.h seem to sum up
all planes.

(sorry, gmail included some html links on last attempt)

On Mon, Jan 2, 2017 at 3:05 PM, Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> wrote:

On Mon, Jan 02, 2017 at 01:23:23PM +0100, David Herrmann wrote:
> Hi
>
> On Mon, Jan 2, 2017 at 11:41 AM, Rainer Hochecker <fernetmenta@xxxxxxx> wrote:
> > From: Rainer Hochecker <fernetmenta@xxxxxxxxx>
> >
> > Add fourcc codes for 16bit planes. Required by mesa for
> > eglCreateImageKHR to access P010 surfaces created by vaapi.
> >
> > Signed-off-by: Rainer Hochecker <fernetmenta@xxxxxxxxx>
> > ---
> >  include/uapi/drm/drm_fourcc.h | 6 ++++++
> >  1 file changed, 6 insertions(+)
> >
> > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> > index a5890bf..e6ab638 100644
> > --- a/include/uapi/drm/drm_fourcc.h
> > +++ b/include/uapi/drm/drm_fourcc.h
> > @@ -41,10 +41,16 @@ extern "C" {
> >  /* 8 bpp Red */
> >  #define DRM_FORMAT_R8          fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
> >
> > +/* 16 bpp Red */
> > +#define DRM_FORMAT_R16         fourcc_code('R', '1', '6', ' ') /* [15:0] R */
> > +
> >  /* 16 bpp RG */
> >  #define DRM_FORMAT_RG88                fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
> >  #define DRM_FORMAT_GR88                fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
> >
> > +/* 32 bpp GR */
> > +#define DRM_FORMAT_GR16                fourcc_code('G', 'R', '1', '6') /* [31:0] G:R 16:16 little endian */
> > +
>
> Shouldn't it be 'G', 'R', '3', '2'?

The name should be _GR1616. Using GR16 for the fourcc seems OK to me
since we can't fit in the full GR1616 in there. Althogh GR32 could work
too I suppose.

And what about RG16?

>
> Also, please put dri-devel on CC.
>
> Thanks
> David
>
> >  /* 8 bpp RGB */
> >  #define DRM_FORMAT_RGB332      fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
> >  #define DRM_FORMAT_BGR233      fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
> > --
> > 2.9.3
> >
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--
Ville Syrjälä
Intel OTC

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