On Fri, 16 Dec 2016, Nicholas Mc Guire <hofrat@xxxxxxxxx> wrote:
> udelay_range(1, 2) is inefficient and as discussions with Jani Nikula
> <jani.nikula@xxxxxxxxxxxxxxx> unnecessary here. This replaces this
> tight setting with a relaxed delay of min=20 and max=50 which helps
> the hrtimer subsystem optimize timer handling.
>
> Fixes: commit be4fc046bed3 ("drm/i915: add VLV DSI PLL Calculations")
> Link: http://lkml.org/lkml/2016/12/15/147
> Signed-off-by: Nicholas Mc Guire <hofrat@xxxxxxxxx>
Pushed to drm-intel-next-queued, thanks for the patch.
BR,
Jani.
> ---
>
> V2: use relaxed uslee_range() rather than udelay
> fix documentation of changed timings
>
> Problem found by coccinelle:
>
> Patch was compile tested with: x86_64_defconfig (implies CONFIG_DRM_I915)
>
> Patch is against 4.9.0 (localversion-next is next-20161215)
>
> drivers/gpu/drm/i915/intel_dsi_pll.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index 56eff60..d210bc4 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -156,8 +156,10 @@ static void vlv_enable_dsi_pll(struct intel_encoder *encoder,
> vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL,
> config->dsi_pll.ctrl & ~DSI_PLL_VCO_EN);
>
> - /* wait at least 0.5 us after ungating before enabling VCO */
> - usleep_range(1, 10);
> + /* wait at least 0.5 us after ungating before enabling VCO,
> + * allow hrtimer subsystem optimization by relaxing timing
> + */
> + usleep_range(10, 50);
>
> vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, config->dsi_pll.ctrl);
--
Jani Nikula, Intel Open Source Technology Center
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