Hi Andrzej,
On 10/10/2016 01:09 PM, Andrzej Hajda wrote:
SiI8620 transmitter converts eTMDS/HDMI signal to MHL 3.0.
It is controlled via I2C bus. Its interaction with other
devices in video pipeline is performed mainly on HW level.
The only interaction it does on device driver level is
filtering-out unsupported video modes, it exposes drm_bridge
interface to perform this operation.
Sorry, I missed seeing the v5 of the patch. There was a sparse
warning and some checkpatch issues which I fixed manually. The
diff between the original and modified C files is as below.
If it looks okay to you, I'll go ahead and merge to drm-misc.
Thanks,
Archit
58c60
< @@ -0,0 +1,1563 @@
---
> @@ -0,0 +1,1565 @@
328c330
< + struct sii8620_mt_msg *msg)
---
> + struct sii8620_mt_msg *msg)
437,439c439,442
< + dcap[MHL_DCAP_MHL_VERSION] / 16, dcap[MHL_DCAP_MHL_VERSION] % 16,
< + dcap[MHL_DCAP_ADOPTER_ID_H], dcap[MHL_DCAP_ADOPTER_ID_L],
< + dcap[MHL_DCAP_DEVICE_ID_H], dcap[MHL_DCAP_DEVICE_ID_L]);
---
> + dcap[MHL_DCAP_MHL_VERSION] / 16,
> + dcap[MHL_DCAP_MHL_VERSION] % 16, dcap[MHL_DCAP_ADOPTER_ID_H],
> + dcap[MHL_DCAP_ADOPTER_ID_L], dcap[MHL_DCAP_DEVICE_ID_H],
> + dcap[MHL_DCAP_DEVICE_ID_L]);
460c463
< + sink_str[ctx->sink_type], sink_name);
---
> + sink_str[ctx->sink_type], sink_name);
535c538
< + BIT_DDC_STATUS_DDC_FIFO_EMPTY);
---
> + BIT_DDC_STATUS_DDC_FIFO_EMPTY);
631c634
< + (ctx->edid->extensions + 1) * EDID_LENGTH);
---
> + (ctx->edid->extensions + 1) * EDID_LENGTH);
769c772,773
< + MHL_DST_LM_CLK_MODE_NORMAL | MHL_DST_LM_PATH_ENABLED);
---
> + MHL_DST_LM_CLK_MODE_NORMAL |
> + MHL_DST_LM_PATH_ENABLED);
1162c1166
< + if ((stat2 & MSK_DISC_STAT2_RGND) == VAL_RGND_1K)
---
> + if ((stat2 & MSK_DISC_STAT2_RGND) == VAL_RGND_1K) {
1164c1168
< + else {
---
> + } else {
1351,1352c1355,1356
< + BIT_TMDS_CSTAT_P3_SCDT_CLR_AVI_DIS
< + | BIT_TMDS_CSTAT_P3_CLR_AVI);
---
> + BIT_TMDS_CSTAT_P3_SCDT_CLR_AVI_DIS |
> + BIT_TMDS_CSTAT_P3_CLR_AVI);
1380,1381c1384,1385
< + VAL_RX_HDMI_CTRL2_DEFVAL
< + | BIT_RX_HDMI_CTRL2_VSI_MON_SEL_VSI);
---
> + VAL_RX_HDMI_CTRL2_DEFVAL |
> + BIT_RX_HDMI_CTRL2_VSI_MON_SEL_VSI);
1478c1482
< + BIT_DPD_PWRON_PLL | BIT_DPD_PDNTX12 | BIT_DPD_OSC_EN);
---
> + BIT_DPD_PWRON_PLL | BIT_DPD_PDNTX12 | BIT_DPD_OSC_EN);
1504,1506c1508,1510
< +bool sii8620_mode_fixup(struct drm_bridge *bridge,
< + const struct drm_display_mode *mode,
< + struct drm_display_mode *adjusted_mode)
---
> +static bool sii8620_mode_fixup(struct drm_bridge *bridge,
> + const struct drm_display_mode *mode,
> + struct drm_display_mode *adjusted_mode)
1528d1531
< +
1560,1561c1563,1565
< + sii8620_irq_thread, IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
< + "sii8620", ctx);
---
> + sii8620_irq_thread,
> + IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
> + "sii8620", ctx);
--
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a Linux Foundation Collaborative Project
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