The IDMAC does support reading and writing DRM_FORMAT_YUV444 and DRM_FORMAT_YVU444. Signed-off-by: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx> --- drivers/gpu/ipu-v3/ipu-common.c | 2 ++ drivers/gpu/ipu-v3/ipu-cpmem.c | 17 +++++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c index b9539f7..b7d7bd6 100644 --- a/drivers/gpu/ipu-v3/ipu-common.c +++ b/drivers/gpu/ipu-v3/ipu-common.c @@ -88,6 +88,8 @@ enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc) case DRM_FORMAT_YVU420: case DRM_FORMAT_YUV422: case DRM_FORMAT_YVU422: + case DRM_FORMAT_YUV444: + case DRM_FORMAT_YVU444: case DRM_FORMAT_NV12: case DRM_FORMAT_NV21: case DRM_FORMAT_NV16: diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c index e6b8bae..4db7475 100644 --- a/drivers/gpu/ipu-v3/ipu-cpmem.c +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c @@ -445,6 +445,16 @@ void ipu_cpmem_set_yuv_planar(struct ipuv3_channel *ch, v_offset = stride * height; u_offset = v_offset + (uv_stride * height); break; + case DRM_FORMAT_YUV444: + uv_stride = stride; + u_offset = stride * height; + v_offset = u_offset + (uv_stride * height); + break; + case DRM_FORMAT_YVU444: + uv_stride = stride; + v_offset = stride * height; + u_offset = v_offset + (uv_stride * height); + break; case DRM_FORMAT_NV12: case DRM_FORMAT_NV16: uv_stride = stride; @@ -595,6 +605,13 @@ int ipu_cpmem_set_fmt(struct ipuv3_channel *ch, u32 drm_fourcc) /* burst size */ ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); break; + case DRM_FORMAT_YUV444: + case DRM_FORMAT_YVU444: + /* pix format */ + ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0); + /* burst size */ + ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); + break; case DRM_FORMAT_NV12: /* pix format */ ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 4); -- 2.9.3 _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
