On 17/09/16 09:25 PM, Mario Kleiner wrote: > Pre DCE4 hardware doesn't have (reliable) pageflip completion > irqs, therefore we have to use the old polling method for flip > completion handling in vblank irq. > > As vblank irqs fire a bit before start of vblank (when the > linebuffer fifo read position reaches end of scanout), we > have some fudge for flip completion handling in the last > lines of active scanout. Old code assumed the threshold to > be 99% of active scanout height, a ballpark estimate which > worked ok. Since we know since a while how to calculate the > actual threshold from linebuffer size, lets make use of it > to get a more accurate threshold. > > This completion path is still prone to some races in corner > cases, especially on pre-AVIVO hardware, so document them > a bit better in the code comments. > > Signed-off-by: Mario Kleiner <mario.kleiner.de@xxxxxxxxx> [...] > + * Note that this method of completion handling is still not 100% race > + * free, as we could execute before the radeon_flip_work_func managed > + * to run and set the RADEON_FLIP_SUBMITTED status, thereby we no-op, > + * but the flip still gets programmed into hw and completed during > + * vblank, leading to a delayed emission of the flip completion event. > + * This applies at least to pre-AVIVO hardware, where flips are always > + * completing inside vblank, not only at leading edge of vblank. Does this part of the comment still apply with patch 2? Anyway, Acked-by: Michel Dänzer <michel.daenzer@xxxxxxx> -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
