On 09/12/16 16:05, Rob Herring wrote: > On Thu, Sep 01, 2016 at 02:22:55PM +0300, Peter Ujfalusi wrote: >> There are display panels which demands that the sync signal is driven on >> different edge than the pixel data. >> With the syncclk-active property we can specify the clk edge to be used to >> drive the sync signal. When the property is missing it indicates that the >> sync is driven on the same edge as the pixel data. >> >> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@xxxxxx> >> CC: Rob Herring <robh+dt@xxxxxxxxxx> >> CC: Mark Rutland <mark.rutland@xxxxxxx> >> CC: devicetree@xxxxxxxxxxxxxxx >> --- >> Documentation/devicetree/bindings/display/panel/display-timing.txt | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/display/panel/display-timing.txt b/Documentation/devicetree/bindings/display/panel/display-timing.txt >> index e1d4a0b59612..1436292e7a56 100644 >> --- a/Documentation/devicetree/bindings/display/panel/display-timing.txt >> +++ b/Documentation/devicetree/bindings/display/panel/display-timing.txt >> @@ -32,6 +32,12 @@ optional properties: >> - active low = drive pixel data on falling edge/ >> sample data on rising edge >> - ignored = ignored >> + - syncclk-active: with >> + - active high = drive sync on rising edge/ > > rising edge of what? pixel clk? Yes, pixel clk, I have copied and modified the 'pixelclk-active' option. Probably it would be better to state it explicitly. > >> + sample sync on falling edge >> + - active low = drive sync on falling edge/ >> + sample sync on rising edge >> + - omitted = same configuration as pixelclk-active >> - interlaced (bool): boolean to enable interlaced mode >> - doublescan (bool): boolean to enable doublescan mode >> - doubleclk (bool): boolean to enable doubleclock mode >> -- >> 2.9.3 >> -- Péter _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
