On 2016-08-31 23:42, Meng Yi wrote: > Hi Stefan, > > Could you test this patch on vf610, I think it will woks fine. See comment below. > > When could you merge this path? And how about the patches for gamma > correction and multi-layer support by the way? Still need to look in those patches. I also have multi-layer patches in our 4.4 tree: http://git.toradex.com/cgit/linux-toradex.git/log/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c?h=toradex_vf_4.4-next This changes also use one plane as cursor plane which probably makes sense given that we have that many planes. I try to send out an updated/rebased patchset soon. > > Best Regards, > Meng > >> > > diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c >> > > b/drivers/gpu/drm/fsl- dcu/fsl_dcu_drm_drv.c index 7882387..a590ce8 >> > > 100644 >> > > --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c >> > > +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c >> > > @@ -386,7 +386,8 @@ static int fsl_dcu_drm_probe(struct >> > > platform_device >> > > *pdev) >> > > snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", >> > > pix_clk_in_name); >> > > fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name, >> > > pix_clk_in_name, 0, base + DCU_DIV_RATIO, >> > > - 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL); >> > > + !strcmp(fsl_dev->soc->name, "ls1021a")?24:0, 8, >> > > + CLK_DIVIDER_ROUND_CLOSEST, NULL); I don't like to sprinkle SoC detection all over the code, it makes it harder when new SoC's with DCU appear. I will send out a patch making use of struct fsl_dcu_soc_data or the like. -- Stefan >> > >> > Tested-by: Meng Yi <meng.yi@xxxxxxx> >> >> On LS1021A-TWR board. >> > >> > > if (IS_ERR(fsl_dev->pix_clk)) { >> > > dev_err(dev, "failed to register pix clk\n"); >> > > ret = PTR_ERR(fsl_dev->pix_clk); >> > > -- >> > > 2.1.0.27.g96db324 _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
