Remove the interlace member and add display_flags to omap_video_timings to
configure the interlace mode.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@xxxxxx>
---
drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c | 2 +-
drivers/gpu/drm/omapdrm/displays/connector-hdmi.c | 2 --
drivers/gpu/drm/omapdrm/dss/dispc.c | 7 +++----
drivers/gpu/drm/omapdrm/dss/dsi.c | 2 +-
drivers/gpu/drm/omapdrm/dss/hdmi5_core.c | 4 ++--
drivers/gpu/drm/omapdrm/dss/hdmi_wp.c | 6 +++---
drivers/gpu/drm/omapdrm/dss/omapdss.h | 4 ++--
drivers/gpu/drm/omapdrm/dss/rfbi.c | 2 +-
drivers/gpu/drm/omapdrm/dss/venc.c | 8 ++++----
drivers/gpu/drm/omapdrm/omap_connector.c | 6 ++++--
10 files changed, 21 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
index d14cc2e3b8e2..0a7491427832 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
@@ -40,7 +40,7 @@ static const struct omap_video_timings tvc_pal_timings = {
.vfront_porch = 5,
.vback_porch = 41,
- .interlace = true,
+ .flags = DISPLAY_FLAGS_INTERLACED,
};
static const struct of_device_id tvc_of_match[];
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
index 00e3aa212202..8e246b9142d7 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
@@ -34,8 +34,6 @@ static const struct omap_video_timings hdmic_default_timings = {
.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
-
- .interlace = false,
};
struct panel_drv_data {
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c
index f21b7dd0f492..858d87dd7fe8 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -2607,7 +2607,7 @@ static int dispc_ovl_setup_common(enum omap_plane plane,
u16 in_height = height;
u16 in_width = width;
int x_predecim = 1, y_predecim = 1;
- bool ilace = mgr_timings->interlace;
+ bool ilace = !!(mgr_timings->flags & DISPLAY_FLAGS_INTERLACED);
unsigned long pclk = dispc_plane_pclk_rate(plane);
unsigned long lclk = dispc_plane_lclk_rate(plane);
@@ -3128,7 +3128,7 @@ bool dispc_mgr_timings_ok(enum omap_channel channel,
if (dss_mgr_is_lcd(channel)) {
/* TODO: OMAP4+ supports interlace for LCD outputs */
- if (timings->interlace)
+ if (timings->flags & DISPLAY_FLAGS_INTERLACED)
return false;
if (!_dispc_lcd_timings_ok(timings->hsync_len,
@@ -3292,7 +3292,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
DSSDBG("hsync %luHz, vsync %luHz\n", ht, vt);
} else {
- if (t.interlace)
+ if (t.flags & DISPLAY_FLAGS_INTERLACED)
t.vactive /= 2;
if (dispc.feat->supports_double_pixel)
@@ -4232,7 +4232,6 @@ static const struct dispc_errata_i734_data {
.vsync_len = 1, .vfront_porch = 1, .vback_porch = 1,
.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
- .interlace = false,
.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
.de_level = OMAPDSS_SIG_ACTIVE_HIGH,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 9ed17dba2849..0d05ac9931a2 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -4122,7 +4122,7 @@ static int dsi_display_init_dispc(struct platform_device *dsidev,
* override interlace, logic level and edge related parameters in
* omap_video_timings with default values
*/
- dsi->timings.interlace = false;
+ dsi->timings.flags &= ~DISPLAY_FLAGS_INTERLACED;
dsi->timings.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
dsi->timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
dsi->timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
index 2baef4f7714b..62268f8d62c6 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
@@ -303,7 +303,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg,
cfg->timings.vback_porch;
video_cfg->v_fc_config.hdmi_dvi_mode = cfg->hdmi_dvi_mode;
- if (cfg->timings.interlace) {
+ if (cfg->timings.flags & DISPLAY_FLAGS_INTERLACED) {
/* set vblank_osc if vblank is fractional */
if (video_cfg->vblank % 2 != 0)
video_cfg->vblank_osc = 1;
@@ -342,7 +342,7 @@ static void hdmi_core_video_config(struct hdmi_core_data *core,
r = FLD_MOD(r, hsync_pol, 5, 5);
r = FLD_MOD(r, cfg->data_enable_pol, 4, 4);
r = FLD_MOD(r, cfg->vblank_osc, 1, 1);
- r = FLD_MOD(r, ovt->interlace, 0, 0);
+ r = FLD_MOD(r, !!(ovt->flags & DISPLAY_FLAGS_INTERLACED), 0, 0);
hdmi_write_reg(base, HDMI_CORE_FC_INVIDCONF, r);
/* set x resolution */
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c b/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
index 90a36b009b1c..231f62ed86ff 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
@@ -156,7 +156,7 @@ void hdmi_wp_video_config_interface(struct hdmi_wp_data *wp,
r = hdmi_read_reg(wp->base, HDMI_WP_VIDEO_CFG);
r = FLD_MOD(r, vsync_pol, 7, 7);
r = FLD_MOD(r, hsync_pol, 6, 6);
- r = FLD_MOD(r, timings->interlace, 3, 3);
+ r = FLD_MOD(r, !!(timings->flags & DISPLAY_FLAGS_INTERLACED), 3, 3);
r = FLD_MOD(r, 1, 1, 0); /* HDMI_TIMING_MASTER_24BIT */
hdmi_write_reg(wp->base, HDMI_WP_VIDEO_CFG, r);
}
@@ -210,10 +210,10 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
timings->vsync_level = param->timings.vsync_level;
timings->hsync_level = param->timings.hsync_level;
- timings->interlace = param->timings.interlace;
timings->double_pixel = param->timings.double_pixel;
+ timings->flags = param->timings.flags;
- if (param->timings.interlace) {
+ if (param->timings.flags & DISPLAY_FLAGS_INTERLACED) {
video_fmt->y_res /= 2;
timings->vback_porch /= 2;
timings->vfront_porch /= 2;
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index aca9d3028155..97acc340dcd5 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -323,8 +323,6 @@ struct omap_video_timings {
enum omap_dss_signal_level vsync_level;
/* Hsync logic level */
enum omap_dss_signal_level hsync_level;
- /* Interlaced or Progressive timings */
- bool interlace;
/* Pixel clock edge to drive LCD data */
enum omap_dss_signal_edge data_pclk_edge;
/* Data enable logic level */
@@ -333,6 +331,8 @@ struct omap_video_timings {
enum omap_dss_signal_edge sync_pclk_edge;
bool double_pixel;
+
+ enum display_flags flags; /* display flags */
};
/* Hardcoded timings for tv modes. Venc only uses these to
diff --git a/drivers/gpu/drm/omapdrm/dss/rfbi.c b/drivers/gpu/drm/omapdrm/dss/rfbi.c
index cc59e644ea52..d5639a5099c8 100644
--- a/drivers/gpu/drm/omapdrm/dss/rfbi.c
+++ b/drivers/gpu/drm/omapdrm/dss/rfbi.c
@@ -865,7 +865,7 @@ static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev)
rfbi.timings.vfront_porch = 0;
rfbi.timings.vback_porch = 0;
- rfbi.timings.interlace = false;
+ rfbi.timings.flags &= ~DISPLAY_FLAGS_INTERLACED;
rfbi.timings.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
rfbi.timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
rfbi.timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
diff --git a/drivers/gpu/drm/omapdrm/dss/venc.c b/drivers/gpu/drm/omapdrm/dss/venc.c
index 411eea6bc99f..e271c75ef632 100644
--- a/drivers/gpu/drm/omapdrm/dss/venc.c
+++ b/drivers/gpu/drm/omapdrm/dss/venc.c
@@ -273,13 +273,13 @@ const struct omap_video_timings omap_dss_pal_timings = {
.vfront_porch = 5,
.vback_porch = 41,
- .interlace = true,
-
.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
.de_level = OMAPDSS_SIG_ACTIVE_HIGH,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
+
+ .flags = DISPLAY_FLAGS_INTERLACED,
};
EXPORT_SYMBOL(omap_dss_pal_timings);
@@ -294,13 +294,13 @@ const struct omap_video_timings omap_dss_ntsc_timings = {
.vfront_porch = 6,
.vback_porch = 31,
- .interlace = true,
-
.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
.de_level = OMAPDSS_SIG_ACTIVE_HIGH,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
+
+ .flags = DISPLAY_FLAGS_INTERLACED,
};
EXPORT_SYMBOL(omap_dss_ntsc_timings);
diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c b/drivers/gpu/drm/omapdrm/omap_connector.c
index d6c4dc1c1fcb..5effce40817f 100644
--- a/drivers/gpu/drm/omapdrm/omap_connector.c
+++ b/drivers/gpu/drm/omapdrm/omap_connector.c
@@ -59,7 +59,7 @@ void copy_timings_omap_to_drm(struct drm_display_mode *mode,
mode->flags = 0;
- if (timings->interlace)
+ if (timings->flags & DISPLAY_FLAGS_INTERLACED)
mode->flags |= DRM_MODE_FLAG_INTERLACE;
if (timings->double_pixel)
@@ -91,7 +91,9 @@ void copy_timings_drm_to_omap(struct omap_video_timings *timings,
timings->vsync_len = mode->vsync_end - mode->vsync_start;
timings->vback_porch = mode->vtotal - mode->vsync_end;
- timings->interlace = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
+ if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+ timings->flags |= DISPLAY_FLAGS_INTERLACED;
+
timings->double_pixel = !!(mode->flags & DRM_MODE_FLAG_DBLCLK);
if (mode->flags & DRM_MODE_FLAG_PHSYNC)
--
2.9.3
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