Re: "Fixes" for page flipping under PRIME on AMD & nouveau

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Am 18.08.2016 um 04:32 schrieb Michel Dänzer:
On 18/08/16 08:51 AM, Mario Kleiner wrote:
There is this other approach from NVidia's Alex Goins for their
proprietary driver, whose patches landed in the X-Server 1.19 master
branch a couple of weeks ago. I haven't read his patches in detail yet,
and i so far couldn't successfully test them with the reference
implementation in modesetting ddx 1.19. Afaik there the display gpu
exports a pair of scanout friendly, page flipping compatible dmabufs (i
assume linear, contiguous, accessible by the display engines),
FWIW, that wouldn't be possible with our "older" GPUs which can't scan
out from GTT: A BO can be either shared with another GPU or scanout
friendly, not both at the same time.

And even for newer GPUs it is quite complicated to setup.

As far as I understood it you need to make sure that at least:
1. A whole line buffered is continuous. E.g. if you want to scan out 1920x1080 32bpp without tilling you need 1920*4=7680 bytes of linear memory. The result is that you need to special allocate your GTT buffer. 2. You can't use multiple layer page tables for the system domain (we already do this). 3. The MC needs to guarantee enough PCIe bandwith for the CRTC. This means you need to reprogram some priorities in the MC differently which can only be done when the whole GPU is idle and we haven't released documentation for at all.

But keep in mind that this is only *AFAIK* and from a document on how the DCE works I read quite a while ago.

Regards,
Christian.
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