On Thu, Aug 04, 2016 at 11:12:27AM +0100, Daniel Stone wrote: > On 4 August 2016 at 11:01, Michel Dänzer <michel@xxxxxxxxxxx> wrote: > > On 04.08.2016 18:51, Daniel Stone wrote: > >> On 4 August 2016 at 04:39, Michel Dänzer <michel@xxxxxxxxxxx> wrote: > >>> Patch 6 extends the ioctl with new flags, which allow userspace to > >>> explicitly specify the target vblank seqno. This can also avoid delaying > >>> flips in some cases where we are already in the target vertical blank > >>> period when the ioctl is called. > >> > >> Is there open userspace for this? > > > > Sure, referenced in patch 6: > > > > https://cgit.freedesktop.org/~daenzer/xf86-video-ati/commit/?id=fc884a8af25345c32bd4104c864ecfeb9bb3db9b > > > > https://cgit.freedesktop.org/~daenzer/xf86-video-amdgpu/commit/?id=b8631a9ba49c0d0ebe5dcd1dbfb68fcfe907296f > > > > > >> What's the behaviour vs. modeset: does the modeset request block until > >> the last-requested flip is complete? If so, is there some kind of upper > >> bound on the number of blank periods to wait for? > > > > Did you read the patch? :) > > Nope, for some reason my mailer decided it didn't like it, but I did > find it in the archives. > > > The only change compared to the existing ioctl is that userspace can ask > > for a flip to take effect in the current vblank seqno. The code added by > > the patch checks for target vblank seqno > current vblank seqno + 1 and > > returns -EINVAL in that case. This is also documented in drm_mode.h. > > Is there any particular benefit to having split absolute/relative > modes in this case? Personally I'm struggling to see the use of > relative. Last time I read the egl spec it specified swap interval as RELATIVE=<interval>, whereas GLX_whatever specified the more sensible ABSOLUTE=<last+interval> behaviour. I suppose that means Mesa is technically not egl compliant with DRI2/3. > > >> Is all this tested somewhere? > > > > Yes, I've been using it for a while on all my machines. > > I mean in a test suite. :) > > Cheers, > Daniel > _______________________________________________ > dri-devel mailing list > dri-devel@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Ville Syrjälä Intel OTC _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
