On ke, 2016-07-20 at 16:18 +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> The primary and sprite planes on CHV pipe B support horizontal
> mirroring. Expose it to the world.
>
> Sadly the hardware ignores the mirror bit when the rotate bit is
> set, so we'll have to reject the 180+X case.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Seems to match spec. Maybe add your own T-b, as you have obviously
tested on hardware.
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx>
Regards, Joonas
> ---
> drivers/gpu/drm/i915/intel_atomic_plane.c | 8 ++++++++
> drivers/gpu/drm/i915/intel_display.c | 10 ++++++++++
> drivers/gpu/drm/i915/intel_sprite.c | 10 ++++++++++
> 3 files changed, 28 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
> index c19eb9a0cd4a..0a019eacfede 100644
> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
> @@ -180,6 +180,14 @@ static int intel_plane_atomic_check(struct drm_plane *plane,
> }
> }
>
> + /* CHV ignores the mirror bit when the rotate bit is set :( */
> + if (IS_CHERRYVIEW(plane->dev) &&
> + state->rotation & BIT(DRM_ROTATE_180) &&
> + state->rotation & BIT(DRM_REFLECT_X)) {
> + DRM_DEBUG_KMS("Cannot rotate and reflect at the same time\n");
> + return -EINVAL;
> + }
> +
> intel_state->visible = false;
> ret = intel_plane->check_plane(plane, crtc_state, intel_state);
> if (ret)
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 88a7c4173715..edb1809a642d 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2677,6 +2677,9 @@ static void i9xx_update_primary_plane(struct drm_plane *primary,
> if (rotation & BIT(DRM_ROTATE_180))
> dspcntr |= DISPPLANE_ROTATE_180;
>
> + if (rotation & BIT(DRM_REFLECT_X))
> + dspcntr |= DISPPLANE_MIRROR;
> +
> if (IS_G4X(dev))
> dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
>
> @@ -2700,6 +2703,9 @@ static void i9xx_update_primary_plane(struct drm_plane *primary,
> linear_offset +=
> (crtc_state->pipe_src_h - 1) * fb->pitches[0] +
> (crtc_state->pipe_src_w - 1) * cpp;
> + } else if (rotation & BIT(DRM_REFLECT_X)) {
> + x += (crtc_state->pipe_src_w - 1);
> + linear_offset += (crtc_state->pipe_src_w - 1) * cpp;
> }
>
> intel_crtc->adjusted_x = x;
> @@ -14295,6 +14301,10 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
> supported_rotations =
> BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_90) |
> BIT(DRM_ROTATE_180) | BIT(DRM_ROTATE_270);
> + } else if (IS_CHERRYVIEW(dev) && pipe == PIPE_B) {
> + supported_rotations =
> + BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_180) |
> + BIT(DRM_REFLECT_X);
> } else if (INTEL_INFO(dev)->gen >= 4) {
> supported_rotations =
> BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_180);
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 14173f53f520..4d6cd1a02e34 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -436,6 +436,9 @@ vlv_update_plane(struct drm_plane *dplane,
> if (rotation & BIT(DRM_ROTATE_180))
> sprctl |= SP_ROTATE_180;
>
> + if (rotation & BIT(DRM_REFLECT_X))
> + sprctl |= SP_MIRROR;
> +
> /* Sizes are 0 based */
> src_w--;
> src_h--;
> @@ -451,6 +454,9 @@ vlv_update_plane(struct drm_plane *dplane,
> x += src_w;
> y += src_h;
> linear_offset += src_h * fb->pitches[0] + src_w * cpp;
> + } else if (rotation & BIT(DRM_REFLECT_X)) {
> + x += src_w;
> + linear_offset += src_w * cpp;
> }
>
> if (key->flags) {
> @@ -1128,6 +1134,10 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
> supported_rotations =
> BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_90) |
> BIT(DRM_ROTATE_180) | BIT(DRM_ROTATE_270);
> + } else if (IS_CHERRYVIEW(dev) && pipe == PIPE_B) {
> + supported_rotations =
> + BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_180) |
> + BIT(DRM_REFLECT_X);
> } else {
> supported_rotations =
> BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_180);
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
_______________________________________________
dri-devel mailing list
dri-devel@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/dri-devel
