[PATCH v4 04/11] drm: Helper to read max clock rate

[Mika Kahola <mika.kahola@xxxxxxxxx>]

Helper routine to read out maximum supported pixel rate
for DisplayPort legay VGA converter or TMDS clock rate
for other digital legacy converters. The helper returns
clock rate in kHz.

Signed-off-by: Mika Kahola <mika.kahola@xxxxxxxxx>
---
 drivers/gpu/drm/drm_dp_helper.c | 28 ++++++++++++++++++++++++++++
 include/drm/drm_dp_helper.h     |  2 ++
 2 files changed, 30 insertions(+)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 7d3b245..18b72eb 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -479,6 +479,34 @@ int drm_dp_downstream_type(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
 }
 EXPORT_SYMBOL(drm_dp_downstream_type);
 
+/**
+ * drm_dp_downstream_max_clock() - extract branch device max
+ *                                 pixel rate for legacy VGA
+ *                                 converter or max TMDS clock
+ *                                 rate for others
+ * @dpcd: DisplayPort configuration data
+ * @port_cap: port capabilities
+ *
+ * Returns max clock in kHz on success or negative error code on failure
+ */
+int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
+                               const u8 port_cap[4])
+{
+	int type = drm_dp_downstream_type(dpcd, port_cap);
+	bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] &
+		DP_DETAILED_CAP_INFO_AVAILABLE;
+
+	if (detailed_cap_info) {
+		if (type == DP_DS_PORT_TYPE_VGA)
+			return port_cap[1] * 8 * 1000;
+		else if (type != DP_DS_PORT_TYPE_WIRELESS)
+			return port_cap[1] * 2500;
+	}
+
+	return -EINVAL;
+}
+EXPORT_SYMBOL(drm_dp_downstream_max_clock);
+
 /*
  * I2C-over-AUX implementation
  */
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index f290829..c3324d3 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -810,6 +810,8 @@ int drm_dp_downstream_port_cap(struct drm_dp_aux *aux,
 			       const u8 dpcd[DP_RECEIVER_CAP_SIZE],
 			       u8 port_cap[4]);
 int drm_dp_downstream_type(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4]);
+int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
+                                const u8 port_cap[4]);
 
 int drm_dp_aux_register(struct drm_dp_aux *aux);
 void drm_dp_aux_unregister(struct drm_dp_aux *aux);
-- 
1.9.1

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