On 2016年06月02日 14:51, Tomasz Figa wrote:
Hi Mark,
Mark Yao <mark.yao <at> rock-chips.com> writes:
No functional changes, sort the vop registers to make
code more readable.
I might have found a typo. I guess it could be just fixed in this patch,
if it's already moving the code around. Please see the comments inline.
Signed-off-by: Mark Yao <mark.yao <at> rock-chips.com>
---
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 166 +++++++++++++--------
------
drivers/gpu/drm/rockchip/rockchip_vop_reg.h | 88 +++++++-------
2 files changed, 127 insertions(+), 127 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 3166b46..e75b2b8 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
<at> <at> -50,6 +50,87 <at> <at> static const uint32_t
formats_win_lite[] = {
DRM_FORMAT_BGR565,
};
+static const struct vop_scl_regs rk3066_win_scl = {
Why is this rk3066 and not rk3036? It doesn't match the sorting order
introduced by this patch, by the way. Typo?
Right, That is my mistake, It's rk3036_win_scl, Typo problem.
Thanks.
+ .scale_yrgb_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
+ .scale_yrgb_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
+ .scale_cbcr_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
+ .scale_cbcr_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
+};
+
+static const struct vop_win_phy rk3036_win0_data = {
+ .scl = &rk3066_win_scl,
Ditto.
Best regards,
Tomasz
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--
Ｍark Yao
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