[Bug 36602] Hierarchical Z support for R600

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https://bugs.freedesktop.org/show_bug.cgi?id=36602

Pierre-Eric Pelloux-Prayer <pelloux@xxxxxxxxx> changed:

           What    |Removed                     |Added
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  Attachment #46081|0                           |1
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  Attachment #46082|0                           |1
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--- Comment #5 from Pierre-Eric Pelloux-Prayer <pelloux@xxxxxxxxx> 2011-05-03 02:36:02 PDT ---
Created an attachment (id=46281)
 View: https://bugs.freedesktop.org/attachment.cgi?id=46281
 Review: https://bugs.freedesktop.org/review?bug=36602&attachment=46281

Updated patch

Here's an updated patch.
Main differences are :
- num tile pipes getter
- algo for determining HTILE_SETTINGS value
- htile buffer size is more precisely calculated

Questions :
- actually htile buffer is allocated to : DB_size_in_pixels * 4 / 4*4. This
could be reduced in some case (when using 8x8 tiles for instance). I was
thinking of moving the htile_settings calculation to r600_texture.c (when HiZ
bo is created), and storing the htile_settings value alongside the HiZ bo
pointer, for future usage (mainly when setting HTILE_SETTINGS register) ?
- I sometimes get this kernel error when enabling HiZ :
[  459.432139] WARNING: at drivers/gpu/drm/radeon/radeon_fence.c:248
radeon_fence_wait+0x2a0/0x33f [radeon]()
[  459.432146] Hardware name: MS-7551
[  459.432152] GPU lockup (waiting for 0x0001216B last fence id 0x00012167)
[....]
[  459.432694]  [<ffffffffa02796c1>] ? drm_ioctl+0x273/0x347 [drm]
I'm not sure where does this come from, and how much this could be related to
HiZ ?

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