Re: [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

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On Wednesday 11 May 2016 09:05 PM, Jon Hunter wrote:
On 11/05/16 14:28, Laxman Dewangan wrote:
On Sunday 08 May 2016 05:43 PM, Jon Hunter wrote:
On 06/05/16 16:32, Laxman Dewangan wrote:
On Friday 06 May 2016 08:07 PM, Jon Hunter wrote:
On 06/05/16 11:45, Laxman Dewangan wrote:
+
+    /* Last entry */
+    TEGRA_IO_PAD_MAX,
Nit should these be TEGRA_IO_PADS_xxx?
Because this was name of single pad and hence I said TEGRA_IO_PAD_XXX.
Aren't these used to set the voltage level and power state for the
entire group of IOs? Confused :-(
One IO pad can have multiple IO pins.
IO Pad control the power state and voltage of all pins belongs to that
IO pad.
Ugh ... I remember for xusb there was something similar we the Tegra
docs used pad to imply multiple. However, in general pad == pin == ball
or at least should.

when we say sddmc3 IO pads, we deal with all signal pins of sdmm3.

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