Am Donnerstag, den 05.05.2016, 10:22 -0400 schrieb Alex Deucher: > On Thu, May 5, 2016 at 5:02 AM, Lucas Stach <dev@xxxxxxxxxx> wrote: > > > > On DCE6.1 PPLL2 is exclusively available to UNIPHYA, so it should > > not > > be taken into consideration when looking for an already enabled PLL > > to be shared with other outputs. > > > > This fixes the broken VGA port (TRAVIS DP->VGA bridge) on my > > Richland > > based laptop, where the internal display is connected to UNIPHYA > > through > > a TRAVIS DP->LVDS bridge. > > > > Bug: > > https://bugs.freedesktop.org/show_bug.cgi?id=78987 > > > > Signed-off-by: Lucas Stach <dev@xxxxxxxxxx> > Nice catch. Need to add a check for the non-dp case as well I think. > How about the attached patch? > This one looks good to me. Thanks, Lucas > Alex > > > > > --- > > drivers/gpu/drm/radeon/atombios_crtc.c | 13 +++++++++---- > > 1 file changed, 9 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c > > b/drivers/gpu/drm/radeon/atombios_crtc.c > > index b80b08f..401bcbd 100644 > > --- a/drivers/gpu/drm/radeon/atombios_crtc.c > > +++ b/drivers/gpu/drm/radeon/atombios_crtc.c > > @@ -1739,7 +1739,8 @@ static u32 radeon_get_pll_use_mask(struct > > drm_crtc *crtc) > > * also in DP mode. For DP, a single PPLL can be used for all DP > > * crtcs/encoders. > > */ > > -static int radeon_get_shared_dp_ppll(struct drm_crtc *crtc) > > +static int radeon_get_shared_dp_ppll(struct radeon_device *rdev, > > + struct drm_crtc *crtc) > > { > > struct drm_device *dev = crtc->dev; > > struct drm_crtc *test_crtc; > > @@ -1751,6 +1752,10 @@ static int radeon_get_shared_dp_ppll(struct > > drm_crtc *crtc) > > test_radeon_crtc = to_radeon_crtc(test_crtc); > > if (test_radeon_crtc->encoder && > > ENCODER_MODE_IS_DP(atombios_get_encoder_mode(te > > st_radeon_crtc->encoder))) { > > + /* PPLL2 is exclusive to UNIPHYA on DCE61 > > */ > > + if (ASIC_IS_DCE61(rdev) && > > !ASIC_IS_DCE8(rdev) && > > + test_radeon_crtc->pll_id == ATOM_PPLL2) > > + continue; > > /* for DP use the same PLL for all */ > > if (test_radeon_crtc->pll_id != > > ATOM_PPLL_INVALID) > > return test_radeon_crtc->pll_id; > > @@ -1859,7 +1864,7 @@ static int radeon_atom_pick_pll(struct > > drm_crtc *crtc) > > return ATOM_PPLL_INVALID; > > else { > > /* use the same PPLL for all DP > > monitors */ > > - pll = > > radeon_get_shared_dp_ppll(crtc); > > + pll = > > radeon_get_shared_dp_ppll(rdev, crtc); > > if (pll != ATOM_PPLL_INVALID) > > return pll; > > } > > @@ -1907,7 +1912,7 @@ static int radeon_atom_pick_pll(struct > > drm_crtc *crtc) > > return ATOM_PPLL_INVALID; > > else { > > /* use the same PPLL for all DP > > monitors */ > > - pll = > > radeon_get_shared_dp_ppll(crtc); > > + pll = > > radeon_get_shared_dp_ppll(rdev, crtc); > > if (pll != ATOM_PPLL_INVALID) > > return pll; > > } > > @@ -1962,7 +1967,7 @@ static int radeon_atom_pick_pll(struct > > drm_crtc *crtc) > > return ATOM_DCPLL; > > else { > > /* use the same PPLL for all DP > > monitors */ > > - pll = > > radeon_get_shared_dp_ppll(crtc); > > + pll = > > radeon_get_shared_dp_ppll(rdev, crtc); > > if (pll != ATOM_PPLL_INVALID) > > return pll; > > } > > -- > > 2.5.5 > > > > _______________________________________________ > > dri-devel mailing list > > dri-devel@xxxxxxxxxxxxxxxxxxxxx > > https://lists.freedesktop.org/mailman/listinfo/dri-devel _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
