From: Eric Huang <JinHuiEric.Huang@xxxxxxx>
Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx>
Acked-by: Christian König <christian.koenig@xxxxxxx>
Signed-off-by: Eric Huang <JinHuiEric.Huang@xxxxxxx>
---
.../powerplay/hwmgr/ellesmere_clockpowergating.c | 28 ++++++++++++++++++++++
.../powerplay/hwmgr/ellesmere_clockpowergating.h | 1 +
.../gpu/drm/amd/powerplay/hwmgr/ellesmere_hwmgr.c | 5 ++++
3 files changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.c
index a94f6a8..93db824 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.c
@@ -398,3 +398,31 @@ int ellesmere_phm_update_clock_gatings(struct pp_hwmgr *hwmgr,
return 0;
}
+
+/* This function is for Baffin only for now,
+ * Powerplay will only control the static per CU Power Gating.
+ * Dynamic per CU Power Gating will be done in gfx.
+ */
+int ellesmere_phm_enable_per_cu_power_gating(struct pp_hwmgr *hwmgr, bool enable)
+{
+ struct cgs_system_info sys_info = {0};
+ uint32_t active_cus;
+ int result;
+
+ sys_info.size = sizeof(struct cgs_system_info);
+ sys_info.info_id = CGS_SYSTEM_INFO_GFX_CU_INFO;
+
+ result = cgs_query_system_info(hwmgr->device, &sys_info);
+
+ if (result)
+ return -EINVAL;
+ else
+ active_cus = sys_info.value;
+
+ if (enable)
+ return smum_send_msg_to_smc_with_parameter(hwmgr->smumgr,
+ PPSMC_MSG_GFX_CU_PG_ENABLE, active_cus);
+ else
+ return smum_send_msg_to_smc(hwmgr->smumgr,
+ PPSMC_MSG_GFX_CU_PG_DISABLE);
+}
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.h b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.h
index a90577e..b403e11 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.h
@@ -35,5 +35,6 @@ int ellesmere_phm_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate);
int ellesmere_phm_disable_clock_power_gating(struct pp_hwmgr *hwmgr);
int ellesmere_phm_update_clock_gatings(struct pp_hwmgr *hwmgr,
const uint32_t *msg_id);
+int ellesmere_phm_enable_per_cu_power_gating(struct pp_hwmgr *hwmgr, bool enable);
#endif /* _ELLESMERE_CLOCK_POWER_GATING_H_ */
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_hwmgr.c
index c87d5ef..152d77d 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_hwmgr.c
@@ -4687,6 +4687,11 @@ static const struct pp_hwmgr_func ellesmere_hwmgr_funcs = {
.register_internal_thermal_interrupt = ellesmere_register_internal_thermal_interrupt,
.check_smc_update_required_for_display_configuration = ellesmere_check_smc_update_required_for_display_configuration,
.check_states_equal = ellesmere_check_states_equal,
+ .get_pp_table = ellesmere_get_pp_table,
+ .set_pp_table = ellesmere_set_pp_table,
+ .force_clock_level = ellesmere_force_clock_level,
+ .print_clock_levels = ellesmere_print_clock_levels,
+ .enable_per_cu_power_gating = ellesmere_phm_enable_per_cu_power_gating,
};
int ellesemere_hwmgr_init(struct pp_hwmgr *hwmgr)
--
2.5.0
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