HDMI-PHY power off bit defaults to 0 in older HDMI versions. In case of Exynos5433 it defaults to 1. To make code consistent across all versions this bit is always unset/set in power on/off sequences. Signed-off-by: Andrzej Hajda <a.hajda@xxxxxxxxxxx> --- drivers/gpu/drm/exynos/exynos_hdmi.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 5c7dbfc..16951f3 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -1757,6 +1757,8 @@ static void hdmi_enable(struct drm_encoder *encoder) hdmi_set_refclk(hdata, true); + hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, 0, HDMI_PHY_POWER_OFF_EN); + hdmi_conf_apply(hdata); hdata->powered = true; @@ -1789,6 +1791,8 @@ static void hdmi_disable(struct drm_encoder *encoder) cancel_delayed_work(&hdata->hotplug_work); + hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, ~0, HDMI_PHY_POWER_OFF_EN); + hdmi_set_refclk(hdata, false); regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL, -- 1.9.1 _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
