Signed-off-by: Nils Wallménius <nils.wallmenius@xxxxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 16 ----------------
drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 26 --------------------------
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 26 --------------------------
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 26 --------------------------
4 files changed, 94 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 4d2c335..739a63d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -255,21 +255,6 @@ struct amdgpu_buffer_funcs {
uint64_t dst_offset,
/* number of byte to transfer */
uint32_t byte_count);
-
- /* maximum bytes in a single operation */
- uint32_t fill_max_bytes;
-
- /* number of dw to reserve per operation */
- unsigned fill_num_dw;
-
- /* used for buffer clearing */
- void (*emit_fill_buffer)(struct amdgpu_ib *ib,
- /* value to write to memory */
- uint32_t src_data,
- /* dst addr in bytes */
- uint64_t dst_offset,
- /* number of byte to fill */
- uint32_t byte_count);
};
/* provided by hw blocks that can write ptes, e.g., sdma */
@@ -2239,7 +2224,6 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
#define amdgpu_display_stop_mc_access(adev, s) (adev)->mode_info.funcs->stop_mc_access((adev), (s))
#define amdgpu_display_resume_mc_access(adev, s) (adev)->mode_info.funcs->resume_mc_access((adev), (s))
#define amdgpu_emit_copy_buffer(adev, ib, s, d, b) (adev)->mman.buffer_funcs->emit_copy_buffer((ib), (s), (d), (b))
-#define amdgpu_emit_fill_buffer(adev, ib, s, d, b) (adev)->mman.buffer_funcs->emit_fill_buffer((ib), (s), (d), (b))
#define amdgpu_dpm_pre_set_power_state(adev) (adev)->pm.funcs->pre_set_power_state((adev))
#define amdgpu_dpm_set_power_state(adev) (adev)->pm.funcs->set_power_state((adev))
#define amdgpu_dpm_post_set_power_state(adev) (adev)->pm.funcs->post_set_power_state((adev))
diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
index 72543f1..28b1b77 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
@@ -1361,36 +1361,10 @@ static void cik_sdma_emit_copy_buffer(struct amdgpu_ib *ib,
ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);
}
-/**
- * cik_sdma_emit_fill_buffer - fill buffer using the sDMA engine
- *
- * @ring: amdgpu_ring structure holding ring information
- * @src_data: value to write to buffer
- * @dst_offset: dst GPU address
- * @byte_count: number of bytes to xfer
- *
- * Fill GPU buffers using the DMA engine (CIK).
- */
-static void cik_sdma_emit_fill_buffer(struct amdgpu_ib *ib,
- uint32_t src_data,
- uint64_t dst_offset,
- uint32_t byte_count)
-{
- ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0, 0);
- ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);
- ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);
- ib->ptr[ib->length_dw++] = src_data;
- ib->ptr[ib->length_dw++] = byte_count;
-}
-
static const struct amdgpu_buffer_funcs cik_sdma_buffer_funcs = {
.copy_max_bytes = 0x1fffff,
.copy_num_dw = 7,
.emit_copy_buffer = cik_sdma_emit_copy_buffer,
-
- .fill_max_bytes = 0x1fffff,
- .fill_num_dw = 5,
- .emit_fill_buffer = cik_sdma_emit_fill_buffer,
};
static void cik_sdma_set_buffer_funcs(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
index 6e0a86a..b0b939a 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
@@ -1367,36 +1367,10 @@ static void sdma_v2_4_emit_copy_buffer(struct amdgpu_ib *ib,
ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);
}
-/**
- * sdma_v2_4_emit_fill_buffer - fill buffer using the sDMA engine
- *
- * @ring: amdgpu_ring structure holding ring information
- * @src_data: value to write to buffer
- * @dst_offset: dst GPU address
- * @byte_count: number of bytes to xfer
- *
- * Fill GPU buffers using the DMA engine (VI).
- */
-static void sdma_v2_4_emit_fill_buffer(struct amdgpu_ib *ib,
- uint32_t src_data,
- uint64_t dst_offset,
- uint32_t byte_count)
-{
- ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL);
- ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);
- ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);
- ib->ptr[ib->length_dw++] = src_data;
- ib->ptr[ib->length_dw++] = byte_count;
-}
-
static const struct amdgpu_buffer_funcs sdma_v2_4_buffer_funcs = {
.copy_max_bytes = 0x1fffff,
.copy_num_dw = 7,
.emit_copy_buffer = sdma_v2_4_emit_copy_buffer,
-
- .fill_max_bytes = 0x1fffff,
- .fill_num_dw = 7,
- .emit_fill_buffer = sdma_v2_4_emit_fill_buffer,
};
static void sdma_v2_4_set_buffer_funcs(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index 8c8ca98..9521e29 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -1635,36 +1635,10 @@ static void sdma_v3_0_emit_copy_buffer(struct amdgpu_ib *ib,
ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);
}
-/**
- * sdma_v3_0_emit_fill_buffer - fill buffer using the sDMA engine
- *
- * @ring: amdgpu_ring structure holding ring information
- * @src_data: value to write to buffer
- * @dst_offset: dst GPU address
- * @byte_count: number of bytes to xfer
- *
- * Fill GPU buffers using the DMA engine (VI).
- */
-static void sdma_v3_0_emit_fill_buffer(struct amdgpu_ib *ib,
- uint32_t src_data,
- uint64_t dst_offset,
- uint32_t byte_count)
-{
- ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL);
- ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);
- ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);
- ib->ptr[ib->length_dw++] = src_data;
- ib->ptr[ib->length_dw++] = byte_count;
-}
-
static const struct amdgpu_buffer_funcs sdma_v3_0_buffer_funcs = {
.copy_max_bytes = 0x1fffff,
.copy_num_dw = 7,
.emit_copy_buffer = sdma_v3_0_emit_copy_buffer,
-
- .fill_max_bytes = 0x1fffff,
- .fill_num_dw = 5,
- .emit_fill_buffer = sdma_v3_0_emit_fill_buffer,
};
static void sdma_v3_0_set_buffer_funcs(struct amdgpu_device *adev)
--
2.7.0
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