On Mon, Jul 26, 2010 at 9:42 PM, Dave Airlie <airlied@xxxxxxxxx> wrote:
> From: Dave Airlie <airlied@xxxxxxxxxx>
>
> This interface allows userspace to request hyperz support, it probably
> needs more locking, and really reporting that you can have hyperz is racy
> since someone else might get it before you do.
>
> v2: modify so we pass 0 valued packets to let DDX/r300c keep working.
> also fixed incorrect 0x4f1c reference.
>
> v3: fixup zb_bw_cntl so older drivers keep working
>
> v4: add locking, fixup SC_HYPERZ_EN - patch stream to disable hiz
>
This conflicts with the version bump and info ioctl number for
r6xx/r7xx/evergreen tiling.
Alex
> Signed-off-by: Dave Airlie <airlied@xxxxxxxxxx>
> ---
> drivers/gpu/drm/radeon/r100.c | 5 +++
> drivers/gpu/drm/radeon/r100d.h | 2 +
> drivers/gpu/drm/radeon/r300.c | 44 ++++++++++++++++++++++++++++++--
> drivers/gpu/drm/radeon/r300d.h | 2 +
> drivers/gpu/drm/radeon/radeon.h | 2 +
> drivers/gpu/drm/radeon/radeon_drv.c | 3 +-
> drivers/gpu/drm/radeon/radeon_kms.c | 14 +++++++++-
> drivers/gpu/drm/radeon/reg_srcs/r300 | 13 ---------
> drivers/gpu/drm/radeon/reg_srcs/r420 | 14 +---------
> drivers/gpu/drm/radeon/reg_srcs/rs600 | 13 ---------
> drivers/gpu/drm/radeon/reg_srcs/rv515 | 13 ---------
> include/drm/radeon_drm.h | 1 +
> 12 files changed, 69 insertions(+), 57 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
> index 3970e62..c6262c1 100644
> --- a/drivers/gpu/drm/radeon/r100.c
> +++ b/drivers/gpu/drm/radeon/r100.c
> @@ -1805,6 +1805,11 @@ static int r100_packet3_check(struct radeon_cs_parser *p,
> return r;
> break;
> /* triggers drawing using indices to vertex buffer */
> + case PACKET3_3D_CLEAR_HIZ:
> + case PACKET3_3D_CLEAR_ZMASK:
> + if (p->rdev->hyperz_filp != p->filp)
> + return -EINVAL;
> + break;
> case PACKET3_NOP:
> break;
> default:
> diff --git a/drivers/gpu/drm/radeon/r100d.h b/drivers/gpu/drm/radeon/r100d.h
> index d016b16..b121b6c 100644
> --- a/drivers/gpu/drm/radeon/r100d.h
> +++ b/drivers/gpu/drm/radeon/r100d.h
> @@ -48,10 +48,12 @@
> #define PACKET3_3D_DRAW_IMMD 0x29
> #define PACKET3_3D_DRAW_INDX 0x2A
> #define PACKET3_3D_LOAD_VBPNTR 0x2F
> +#define PACKET3_3D_CLEAR_ZMASK 0x32
> #define PACKET3_INDX_BUFFER 0x33
> #define PACKET3_3D_DRAW_VBUF_2 0x34
> #define PACKET3_3D_DRAW_IMMD_2 0x35
> #define PACKET3_3D_DRAW_INDX_2 0x36
> +#define PACKET3_3D_CLEAR_HIZ 0x37
> #define PACKET3_BITBLT_MULTI 0x9B
>
> #define PACKET0(reg, n) (CP_PACKET0 | \
> diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
> index 7e81db5..a12ca69 100644
> --- a/drivers/gpu/drm/radeon/r300.c
> +++ b/drivers/gpu/drm/radeon/r300.c
> @@ -1047,14 +1047,47 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
> /* RB3D_COLOR_CHANNEL_MASK */
> track->color_channel_mask = idx_value;
> break;
> - case 0x4d1c:
> + case 0x43a4:
> + /* SC_HYPERZ_EN */
> + /* r300c emits this register - we need to disable hyperz for it
> + * without complaining */
> + if (p->rdev->hyperz_filp != p->filp) {
> + if (idx_value & 0x1)
> + ib[idx] = idx_value & ~1;
> + }
> + break;
> + case 0x4f1c:
> /* ZB_BW_CNTL */
> track->zb_cb_clear = !!(idx_value & (1 << 5));
> + if (p->rdev->hyperz_filp != p->filp) {
> + if (idx_value & (R300_HIZ_ENABLE |
> + R300_RD_COMP_ENABLE |
> + R300_WR_COMP_ENABLE |
> + R300_FAST_FILL_ENABLE))
> + goto fail;
> + }
> break;
> case 0x4e04:
> /* RB3D_BLENDCNTL */
> track->blend_read_enable = !!(idx_value & (1 << 2));
> break;
> + case 0x4f28: /* ZB_DEPTHCLEARVALUE */
> + break;
> + case 0x4f30: /* ZB_MASK_OFFSET */
> + case 0x4f34: /* ZB_ZMASK_PITCH */
> + case 0x4f44: /* ZB_HIZ_OFFSET */
> + case 0x4f54: /* ZB_HIZ_PITCH */
> + if (idx_value && (p->rdev->hyperz_filp != p->filp))
> + goto fail;
> + break;
> + case 0x4028:
> + if (idx_value && (p->rdev->hyperz_filp != p->filp))
> + goto fail;
> + /* GB_Z_PEQ_CONFIG */
> + if (p->rdev->family >= CHIP_RV350)
> + break;
> + goto fail;
> + break;
> case 0x4be8:
> /* valid register only on RV530 */
> if (p->rdev->family == CHIP_RV530)
> @@ -1065,8 +1098,8 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
> }
> return 0;
> fail:
> - printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n",
> - reg, idx);
> + printk(KERN_ERR "Forbidden register 0x%04X in cs at %d (val=%08x)\n",
> + reg, idx, idx_value);
> return -EINVAL;
> }
>
> @@ -1160,6 +1193,11 @@ static int r300_packet3_check(struct radeon_cs_parser *p,
> return r;
> }
> break;
> + case PACKET3_3D_CLEAR_HIZ:
> + case PACKET3_3D_CLEAR_ZMASK:
> + if (p->rdev->hyperz_filp != p->filp)
> + return -EINVAL;
> + break;
> case PACKET3_NOP:
> break;
> default:
> diff --git a/drivers/gpu/drm/radeon/r300d.h b/drivers/gpu/drm/radeon/r300d.h
> index 968a333..0c036c6 100644
> --- a/drivers/gpu/drm/radeon/r300d.h
> +++ b/drivers/gpu/drm/radeon/r300d.h
> @@ -48,10 +48,12 @@
> #define PACKET3_3D_DRAW_IMMD 0x29
> #define PACKET3_3D_DRAW_INDX 0x2A
> #define PACKET3_3D_LOAD_VBPNTR 0x2F
> +#define PACKET3_3D_CLEAR_ZMASK 0x32
> #define PACKET3_INDX_BUFFER 0x33
> #define PACKET3_3D_DRAW_VBUF_2 0x34
> #define PACKET3_3D_DRAW_IMMD_2 0x35
> #define PACKET3_3D_DRAW_INDX_2 0x36
> +#define PACKET3_3D_CLEAR_HIZ 0x37
> #define PACKET3_BITBLT_MULTI 0x9B
>
> #define PACKET0(reg, n) (CP_PACKET0 | \
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index ab61aaa..e4ab99f 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -1077,6 +1077,8 @@ struct radeon_device {
>
> bool powered_down;
> struct notifier_block acpi_nb;
> + /* only one userspace can use Hyperz features at a time */
> + struct drm_file *hyperz_filp;
> };
>
> int radeon_device_init(struct radeon_device *rdev,
> diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
> index e166fe4..6fb5dc6 100644
> --- a/drivers/gpu/drm/radeon/radeon_drv.c
> +++ b/drivers/gpu/drm/radeon/radeon_drv.c
> @@ -46,9 +46,10 @@
> * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
> * - 2.4.0 - add crtc id query
> * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
> + * - 2.6.0 - add crappy support for CLEAR_HIZ / CLEAR_ZMASK
> */
> #define KMS_DRIVER_MAJOR 2
> -#define KMS_DRIVER_MINOR 5
> +#define KMS_DRIVER_MINOR 6
> #define KMS_DRIVER_PATCHLEVEL 0
> int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
> int radeon_driver_unload_kms(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
> index 6a70c0d..876c092 100644
> --- a/drivers/gpu/drm/radeon/radeon_kms.c
> +++ b/drivers/gpu/drm/radeon/radeon_kms.c
> @@ -141,6 +141,16 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
> case RADEON_INFO_ACCEL_WORKING2:
> value = rdev->accel_working;
> break;
> + case RADEON_INFO_WANT_HYPERZ:
> + mutex_lock(&dev->struct_mutex);
> + if (rdev->hyperz_filp)
> + value = 0;
> + else {
> + rdev->hyperz_filp = filp;
> + value = 1;
> + }
> + mutex_unlock(&dev->struct_mutex);
> + break;
> default:
> DRM_DEBUG("Invalid request %d\n", info->request);
> return -EINVAL;
> @@ -180,9 +190,11 @@ void radeon_driver_postclose_kms(struct drm_device *dev,
> void radeon_driver_preclose_kms(struct drm_device *dev,
> struct drm_file *file_priv)
> {
> + struct radeon_device *rdev = dev->dev_private;
> + if (rdev->hyperz_filp == file_priv)
> + rdev->hyperz_filp = NULL;
> }
>
> -
> /*
> * VBlank related functions.
> */
> diff --git a/drivers/gpu/drm/radeon/reg_srcs/r300 b/drivers/gpu/drm/radeon/reg_srcs/r300
> index 1e97b2d..b506ec1 100644
> --- a/drivers/gpu/drm/radeon/reg_srcs/r300
> +++ b/drivers/gpu/drm/radeon/reg_srcs/r300
> @@ -187,7 +187,6 @@ r300 0x4f60
> 0x4364 RS_INST_13
> 0x4368 RS_INST_14
> 0x436C RS_INST_15
> -0x43A4 SC_HYPERZ_EN
> 0x43A8 SC_EDGERULE
> 0x43B0 SC_CLIP_0_A
> 0x43B4 SC_CLIP_0_B
> @@ -716,16 +715,4 @@ r300 0x4f60
> 0x4F08 ZB_STENCILREFMASK
> 0x4F14 ZB_ZTOP
> 0x4F18 ZB_ZCACHE_CTLSTAT
> -0x4F1C ZB_BW_CNTL
> -0x4F28 ZB_DEPTHCLEARVALUE
> -0x4F30 ZB_ZMASK_OFFSET
> -0x4F34 ZB_ZMASK_PITCH
> -0x4F38 ZB_ZMASK_WRINDEX
> -0x4F3C ZB_ZMASK_DWORD
> -0x4F40 ZB_ZMASK_RDINDEX
> -0x4F44 ZB_HIZ_OFFSET
> -0x4F48 ZB_HIZ_WRINDEX
> -0x4F4C ZB_HIZ_DWORD
> -0x4F50 ZB_HIZ_RDINDEX
> -0x4F54 ZB_HIZ_PITCH
> 0x4F58 ZB_ZPASS_DATA
> diff --git a/drivers/gpu/drm/radeon/reg_srcs/r420 b/drivers/gpu/drm/radeon/reg_srcs/r420
> index e958980..8c1214c 100644
> --- a/drivers/gpu/drm/radeon/reg_srcs/r420
> +++ b/drivers/gpu/drm/radeon/reg_srcs/r420
> @@ -130,6 +130,7 @@ r420 0x4f60
> 0x401C GB_SELECT
> 0x4020 GB_AA_CONFIG
> 0x4024 GB_FIFO_SIZE
> +0x4028 GB_Z_PEQ_CONFIG
> 0x4100 TX_INVALTAGS
> 0x4200 GA_POINT_S0
> 0x4204 GA_POINT_T0
> @@ -187,7 +188,6 @@ r420 0x4f60
> 0x4364 RS_INST_13
> 0x4368 RS_INST_14
> 0x436C RS_INST_15
> -0x43A4 SC_HYPERZ_EN
> 0x43A8 SC_EDGERULE
> 0x43B0 SC_CLIP_0_A
> 0x43B4 SC_CLIP_0_B
> @@ -782,16 +782,4 @@ r420 0x4f60
> 0x4F08 ZB_STENCILREFMASK
> 0x4F14 ZB_ZTOP
> 0x4F18 ZB_ZCACHE_CTLSTAT
> -0x4F1C ZB_BW_CNTL
> -0x4F28 ZB_DEPTHCLEARVALUE
> -0x4F30 ZB_ZMASK_OFFSET
> -0x4F34 ZB_ZMASK_PITCH
> -0x4F38 ZB_ZMASK_WRINDEX
> -0x4F3C ZB_ZMASK_DWORD
> -0x4F40 ZB_ZMASK_RDINDEX
> -0x4F44 ZB_HIZ_OFFSET
> -0x4F48 ZB_HIZ_WRINDEX
> -0x4F4C ZB_HIZ_DWORD
> -0x4F50 ZB_HIZ_RDINDEX
> -0x4F54 ZB_HIZ_PITCH
> 0x4F58 ZB_ZPASS_DATA
> diff --git a/drivers/gpu/drm/radeon/reg_srcs/rs600 b/drivers/gpu/drm/radeon/reg_srcs/rs600
> index 83e8bc0..0828d80 100644
> --- a/drivers/gpu/drm/radeon/reg_srcs/rs600
> +++ b/drivers/gpu/drm/radeon/reg_srcs/rs600
> @@ -187,7 +187,6 @@ rs600 0x6d40
> 0x4364 RS_INST_13
> 0x4368 RS_INST_14
> 0x436C RS_INST_15
> -0x43A4 SC_HYPERZ_EN
> 0x43A8 SC_EDGERULE
> 0x43B0 SC_CLIP_0_A
> 0x43B4 SC_CLIP_0_B
> @@ -782,16 +781,4 @@ rs600 0x6d40
> 0x4F08 ZB_STENCILREFMASK
> 0x4F14 ZB_ZTOP
> 0x4F18 ZB_ZCACHE_CTLSTAT
> -0x4F1C ZB_BW_CNTL
> -0x4F28 ZB_DEPTHCLEARVALUE
> -0x4F30 ZB_ZMASK_OFFSET
> -0x4F34 ZB_ZMASK_PITCH
> -0x4F38 ZB_ZMASK_WRINDEX
> -0x4F3C ZB_ZMASK_DWORD
> -0x4F40 ZB_ZMASK_RDINDEX
> -0x4F44 ZB_HIZ_OFFSET
> -0x4F48 ZB_HIZ_WRINDEX
> -0x4F4C ZB_HIZ_DWORD
> -0x4F50 ZB_HIZ_RDINDEX
> -0x4F54 ZB_HIZ_PITCH
> 0x4F58 ZB_ZPASS_DATA
> diff --git a/drivers/gpu/drm/radeon/reg_srcs/rv515 b/drivers/gpu/drm/radeon/reg_srcs/rv515
> index 1e46233..8293855 100644
> --- a/drivers/gpu/drm/radeon/reg_srcs/rv515
> +++ b/drivers/gpu/drm/radeon/reg_srcs/rv515
> @@ -235,7 +235,6 @@ rv515 0x6d40
> 0x4354 RS_INST_13
> 0x4358 RS_INST_14
> 0x435C RS_INST_15
> -0x43A4 SC_HYPERZ_EN
> 0x43A8 SC_EDGERULE
> 0x43B0 SC_CLIP_0_A
> 0x43B4 SC_CLIP_0_B
> @@ -479,17 +478,5 @@ rv515 0x6d40
> 0x4F08 ZB_STENCILREFMASK
> 0x4F14 ZB_ZTOP
> 0x4F18 ZB_ZCACHE_CTLSTAT
> -0x4F1C ZB_BW_CNTL
> -0x4F28 ZB_DEPTHCLEARVALUE
> -0x4F30 ZB_ZMASK_OFFSET
> -0x4F34 ZB_ZMASK_PITCH
> -0x4F38 ZB_ZMASK_WRINDEX
> -0x4F3C ZB_ZMASK_DWORD
> -0x4F40 ZB_ZMASK_RDINDEX
> -0x4F44 ZB_HIZ_OFFSET
> -0x4F48 ZB_HIZ_WRINDEX
> -0x4F4C ZB_HIZ_DWORD
> -0x4F50 ZB_HIZ_RDINDEX
> -0x4F54 ZB_HIZ_PITCH
> 0x4F58 ZB_ZPASS_DATA
> 0x4FD4 ZB_STENCILREFMASK_BF
> diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h
> index 5347063..d6577b4 100644
> --- a/include/drm/radeon_drm.h
> +++ b/include/drm/radeon_drm.h
> @@ -904,6 +904,7 @@ struct drm_radeon_cs {
> #define RADEON_INFO_ACCEL_WORKING 0x03
> #define RADEON_INFO_CRTC_FROM_ID 0x04
> #define RADEON_INFO_ACCEL_WORKING2 0x05
> +#define RADEON_INFO_WANT_HYPERZ 0x06
>
> struct drm_radeon_info {
> uint32_t request;
> --
> 1.7.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
>
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