On Tue, Apr 20, 2010 at 02:31:52PM +0200, glisse at freedesktop.org wrote:
> From: Jerome Glisse <jglisse at redhat.com>
>
> Convert most AGP chipset to use scratch page as default entries.
> This help avoiding GPU querying 0 address and trigger computer
> fault. With KMS and memory manager we bind/unbind AGP memory
> constantly and it seems that some GPU are still doing AGP
> traffic even after GPU report being idle with the memory segment.
>
> Tested (radeon GPU KMS + Xorg + compiz + glxgears + quake3) on :
> - SIS 1039:0001 & 1039:0003
> - Intel 865 8086:2571
>
> Compile tested for other bridges
>
> V2 enable scratch page on uninorth
>
> Signed-off-by: Jerome Glisse <jglisse at redhat.com>
<snip>
> diff --git a/drivers/char/agp/amd-k7-agp.c b/drivers/char/agp/amd-k7-agp.c
> index 73dbf40..cf4dc4c 100644
> --- a/drivers/char/agp/amd-k7-agp.c
> +++ b/drivers/char/agp/amd-k7-agp.c
> @@ -178,6 +179,13 @@ static int amd_create_gatt_table(struct agp_bridge_data *bridge)
> readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr)); /* PCI Posting. */
> }
>
> + for (i = 0; i < value->num_entries; i++) {
> + addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
> + cur_gatt = GET_GATT(addr);
> + writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
> + readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
> + }
Isn't it enough to do a single PCI posting flush after writing all the
entries?
--
Ville Syrj?l?
syrjala at sci.fi
http://www.sci.fi/~syrjala/
