Document the QPIC NAND controller v2.1.1 being used in SDX75 SoC and it uses BAM DMA. SDX75 NAND controller has DMA-coherent and iommu support so define them in the properties section, without which 'dtbs_check' reports the following error: nand-controller@1cc8000: Unevaluated properties are not allowed ('dma-coherent', 'iommus' were unexpected) Signed-off-by: Kaushal Kumar <quic_kaushalk@xxxxxxxxxxx> --- .../devicetree/bindings/mtd/qcom,nandc.yaml | 23 ++++++++++++++----- 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml index 35b4206ea918..8b77e8837205 100644 --- a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml +++ b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml @@ -11,12 +11,17 @@ maintainers: properties: compatible: - enum: - - qcom,ipq806x-nand - - qcom,ipq4019-nand - - qcom,ipq6018-nand - - qcom,ipq8074-nand - - qcom,sdx55-nand + OneOf: + - items: + - enum: + - qcom,sdx75-nand + - const: qcom,sdx55-nand + - items: + - const: qcom,ipq806x-nand + - const: qcom,ipq4019-nand + - const: qcom,ipq6018-nand + - const: qcom,ipq8074-nand + - const: qcom,sdx55-nand reg: maxItems: 1 @@ -31,6 +36,12 @@ properties: - const: core - const: aon + dma-coherent: true + + iommus: + minItems: 1 + maxItems: 3 + qcom,cmd-crci: $ref: /schemas/types.yaml#/definitions/uint32 description: -- 2.17.1