Hi Fabrizio,
On Thu, 13 Feb 2025 at 15:19, Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> On Wed, 12 Feb 2025 at 23:13, Fabrizio Castro
> <fabrizio.castro.jz@xxxxxxxxxxx> wrote:
> > The DMAC IP found on the Renesas RZ/V2H(P) family of SoCs is
> > similar to the version found on the Renesas RZ/G2L family of
> > SoCs, but there are some differences:
> > * It only uses one register area
> > * It only uses one clock
> > * It only uses one reset
> > * Instead of using MID/IRD it uses REQ NO/ACK NO
> > * It is connected to the Interrupt Control Unit (ICU)
> > * On the RZ/G2L there is only 1 DMAC, on the RZ/V2H(P) there are 5
> >
> > Add specific support for the Renesas RZ/V2H(P) family of SoC by
> > tackling the aforementioned differences.
> >
> > Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@xxxxxxxxxxx>
> > ---
> > v1->v2:
> > * Switched to new macros for minimum values.
>
> Thanks for the update!
>
> > --- a/drivers/dma/sh/Kconfig
> > +++ b/drivers/dma/sh/Kconfig
> > @@ -53,6 +53,7 @@ config RZ_DMAC
> > depends on ARCH_R7S72100 || ARCH_RZG2L || COMPILE_TEST
> > select RENESAS_DMA
> > select DMA_VIRTUAL_CHANNELS
> > + select RENESAS_RZV2H_ICU
>
> This enables RENESAS_RZV2H_ICU unconditionally, while it is only
> really needed on RZ/V2H, and not on other arm64 SoCs, or on arm32
> or riscv SoCs.
As ARCH_R9A09G057 already selects RENESAS_RZV2H_ICU, you could provide
a dummy rzv2h_icu_register_dma_req_ack() for the !RENESAS_RZV2H_ICU
case, or even disable all ICU-related code when it is not needed.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
