On 05/12/2024 17:07, Ken Sloat wrote: >>> + 1. The mux input number/line for the request >>> + 2. Bitfield representing DMA channel configuration that is passed >>> + to the real DMA controller >>> + 3. Bitfield representing device dependent DMA features passed to >>> + the real DMA controller >>> + >>> + For bitfield definitions of cells 2 and 3, see the associated >>> + bindings doc for the actual DMA controller the mux is connected >> >> This does not sound right. This is the binding for DMA controller, so >> you are saying "please look at itself". I suggest to drop this as well. >> > > While logically it is the DMA controller, this doc is specifically for > the mux - the DMA controller has its own driver and binding docs in > Documentation/devicetree/bindings/dma/stm32/st,stm32-dma.yaml > > I can reference st,stm32-dma.yaml directly, but I was unsure if this > mux IP was used with another DMA controller from ST on a different > SoC. > > What do you suggest here? Thanks for explanation, I think it is fine. Best regards, Krzysztof
