On 21/05/2024 13:08, Sameer Pujar wrote: > From: Mohan Kumar <mkumard@xxxxxxxxxx> > > For Non-Hypervisor mode, Tegra ADMA driver requires the register > resource range to include both global and channel page in the reg > entry. For Hypervisor more, Tegra ADMA driver requires only the > channel page and global page range is not allowed for access. > > Add reg-names DT binding for Hypervisor mode to help driver to > differentiate the config between Hypervisor and Non-Hypervisor > mode of execution. > > Signed-off-by: Mohan Kumar <mkumard@xxxxxxxxxx> > Signed-off-by: Sameer Pujar <spujar@xxxxxxxxxx> > --- > .../devicetree/bindings/dma/nvidia,tegra210-adma.yaml | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml > index 877147e95ecc..ede47f4a3eec 100644 > --- a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml > +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml > @@ -29,8 +29,18 @@ properties: > - const: nvidia,tegra186-adma > > reg: > + description: | > + For hypervisor mode, the address range should include a > + ADMA channel page address range, for non-hypervisor mode > + it starts with ADMA base address covering Global and Channel > + page address range. > maxItems: 1 > > + reg-names: > + description: only required for Hypervisor mode. This does not work like that. I provide vm entry for non-hypervisor mode and what? You claim it is virtualized? Drop property. Best regards, Krzysztof
