On 29-03-24, 10:04, Inochi Amaoto wrote: > The "top" system controller of CV18XX/SG200X exposes control > register access for various devices. Add soc header file to > describe it. > > Signed-off-by: Inochi Amaoto <inochiama@xxxxxxxxxxx> > --- > include/soc/sophgo/cv1800-sysctl.h | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > create mode 100644 include/soc/sophgo/cv1800-sysctl.h > > diff --git a/include/soc/sophgo/cv1800-sysctl.h b/include/soc/sophgo/cv1800-sysctl.h > new file mode 100644 > index 000000000000..b9396d33e240 > --- /dev/null > +++ b/include/soc/sophgo/cv1800-sysctl.h > @@ -0,0 +1,30 @@ > +/* SPDX-License-Identifier: GPL-2.0-or-later */ > +/* > + * Copyright (C) 2023 Inochi Amaoto <inochiama@xxxxxxxxxxx> > + */ > + > +#ifndef CV1800_SYSCTL_H > +#define CV1800_SYSCTL_H > + > +/* > + * SOPHGO CV1800/SG2000 SoC top system controller registers offsets. > + */ > + > +#define CV1800_CONF_INFO 0x004 > +#define CV1800_SYS_CTRL_REG 0x008 > +#define CV1800_USB_PHY_CTRL_REG 0x048 > +#define CV1800_SDMA_DMA_CHANNEL_REMAP0 0x154 > +#define CV1800_SDMA_DMA_CHANNEL_REMAP1 0x158 > +#define CV1800_TOP_TIMER_CLK_SEL 0x1a0 > +#define CV1800_TOP_WDT_CTRL 0x1a8 > +#define CV1800_DDR_AXI_URGENT_OW 0x1b8 > +#define CV1800_DDR_AXI_URGENT 0x1bc > +#define CV1800_DDR_AXI_QOS_0 0x1d8 > +#define CV1800_DDR_AXI_QOS_1 0x1dc > +#define CV1800_SD_PWRSW_CTRL 0x1f4 > +#define CV1800_SD_PWRSW_TIME 0x1f8 > +#define CV1800_DDR_AXI_QOS_OW 0x23c > +#define CV1800_SD_CTRL_OPT 0x294 > +#define CV1800_SDMA_DMA_INT_MUX 0x298 Why are these register defines in soc, all the dma registers should belong to dma driver and other IPs, why do you need a common header?? -- ~Vinod
