From: Dom Cobley <popcornmix@xxxxxxxxx>
Add a control bit to enable a multi-beat burst on a DMA.
This improves DMA performance and is required for HDMI audio.
Signed-off-by: Dom Cobley <popcornmix@xxxxxxxxx>
Signed-off-by: Andrea della Porta <andrea.porta@xxxxxxxx>
---
drivers/dma/bcm2835-dma.c | 28 ++++++++++++++++++++--------
1 file changed, 20 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c
index d8d1f9ba2572..a20700a400a2 100644
--- a/drivers/dma/bcm2835-dma.c
+++ b/drivers/dma/bcm2835-dma.c
@@ -156,7 +156,8 @@ struct bcm2835_desc {
#define BCM2835_DMA_S_WIDTH BIT(9) /* 128bit writes if set */
#define BCM2835_DMA_S_DREQ BIT(10) /* enable SREQ for source */
#define BCM2835_DMA_S_IGNORE BIT(11) /* ignore source reads - read 0 */
-#define BCM2835_DMA_BURST_LENGTH(x) ((x & 15) << 12)
+#define BCM2835_DMA_BURST_LENGTH(x) (((x) & 15) << 12)
+#define BCM2835_DMA_GET_BURST_LENGTH(x) (((x) >> 12) & 15)
#define BCM2835_DMA_CS_FLAGS(x) ((x) & (BCM2835_DMA_PRIORITY(15) | \
BCM2835_DMA_PANIC_PRIORITY(15) | \
BCM2835_DMA_WAIT_FOR_WRITES | \
@@ -180,6 +181,11 @@ struct bcm2835_desc {
#define WIDE_DEST(x) (((x) & BCM2835_DMA_WIDE_DEST) ? \
BCM2835_DMA_D_WIDTH : 0)
+/* A fake bit to request that the driver requires multi-beat burst */
+#define BCM2835_DMA_BURST BIT(30)
+#define BURST_LENGTH(x) (((x) & BCM2835_DMA_BURST) ? \
+ BCM2835_DMA_BURST_LENGTH(3) : 0)
+
/* debug register bits */
#define BCM2835_DMA_DEBUG_LAST_NOT_SET_ERR BIT(0)
#define BCM2835_DMA_DEBUG_FIFO_ERR BIT(1)
@@ -282,7 +288,7 @@ struct bcm2835_desc {
/* the max dma length for different channels */
#define MAX_DMA40_LEN SZ_1G
-#define BCM2711_DMA40_BURST_LEN(x) ((min(x, 16) - 1) << 8)
+#define BCM2711_DMA40_BURST_LEN(x) (((x) & 15) << 8)
#define BCM2711_DMA40_INC BIT(12)
#define BCM2711_DMA40_SIZE_32 (0 << 13)
#define BCM2711_DMA40_SIZE_64 (1 << 13)
@@ -359,12 +365,16 @@ static inline uint32_t to_bcm2711_ti(uint32_t info)
static inline uint32_t to_bcm2711_srci(uint32_t info)
{
- return ((info & BCM2835_DMA_S_INC) ? BCM2711_DMA40_INC : 0);
+ return ((info & BCM2835_DMA_S_INC) ? BCM2711_DMA40_INC : 0) |
+ ((info & BCM2835_DMA_S_WIDTH) ? BCM2711_DMA40_SIZE_128 : 0) |
+ BCM2711_DMA40_BURST_LEN(BCM2835_DMA_GET_BURST_LENGTH(info));
}
static inline uint32_t to_bcm2711_dsti(uint32_t info)
{
- return ((info & BCM2835_DMA_D_INC) ? BCM2711_DMA40_INC : 0);
+ return ((info & BCM2835_DMA_D_INC) ? BCM2711_DMA40_INC : 0) |
+ ((info & BCM2835_DMA_D_WIDTH) ? BCM2711_DMA40_SIZE_128 : 0) |
+ BCM2711_DMA40_BURST_LEN(BCM2835_DMA_GET_BURST_LENGTH(info));
}
static inline uint32_t to_bcm2711_cbaddr(dma_addr_t addr)
@@ -933,7 +943,8 @@ static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_memcpy(
struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
struct bcm2835_desc *d;
u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC |
- WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
+ WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) |
+ WIDE_DEST(c->dreq) | BURST_LENGTH(c->dreq);
u32 extra = BCM2835_DMA_INT_EN;
size_t max_len = bcm2835_dma_max_frame_length(c);
size_t frames;
@@ -964,8 +975,8 @@ static struct dma_async_tx_descriptor *bcm2835_dma_prep_slave_sg(
struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
struct bcm2835_desc *d;
dma_addr_t src = 0, dst = 0;
- u32 info = WAIT_RESP(c->dreq) |
- WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
+ u32 info = WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) |
+ WIDE_DEST(c->dreq) | BURST_LENGTH(c->dreq);
u32 extra = BCM2835_DMA_INT_EN;
size_t frames;
@@ -1017,7 +1028,8 @@ static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic(
struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
struct bcm2835_desc *d;
dma_addr_t src, dst;
- u32 info = WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
+ u32 info = WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) |
+ WIDE_DEST(c->dreq) | BURST_LENGTH(c->dreq);
u32 extra = 0;
size_t max_len = bcm2835_dma_max_frame_length(c);
size_t frames;
--
2.41.0
