On 23-08-30 14:48:45, Konrad Dybcio wrote:
> As expected, Qualcomm DWC3 implementation come with a sizable number
> of quirks. Make sure to account for all of them.
>
> Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
> ---
That is a lot of quirks I missed :D.
Reviewed-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index 944b4b8c95f5..8ee61c9383ec 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -2930,12 +2930,20 @@ usb_1_dwc3: usb@a600000 {
> reg = <0x0 0x0a600000 0x0 0xcd00>;
> interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> iommus = <&apps_smmu 0x40 0x0>;
> - snps,dis_u2_susphy_quirk;
> - snps,dis_enblslpm_quirk;
> - snps,usb3_lpm_capable;
> phys = <&usb_1_hsphy>,
> <&usb_dp_qmpphy QMP_USB43DP_USB3_PHY>;
> phy-names = "usb2-phy", "usb3-phy";
> + snps,hird-threshold = /bits/ 8 <0x0>;
> + snps,usb2-gadget-lpm-disable;
> + snps,dis_u2_susphy_quirk;
> + snps,dis_enblslpm_quirk;
> + snps,dis-u1-entry-quirk;
> + snps,dis-u2-entry-quirk;
> + snps,is-utmi-l1-suspend;
> + snps,usb3_lpm_capable;
> + snps,usb2-lpm-disable;
> + snps,has-lpm-erratum;
> + tx-fifo-resize;
>
> ports {
> #address-cells = <1>;
>
> --
> 2.42.0
>
