Hi Baolu,
On Sat, 10 Jun 2023 20:13:03 +0800, Baolu Lu <baolu.lu@xxxxxxxxxxxxxxx>
wrote:
> On 6/3/23 2:22 AM, Jacob Pan wrote:
> > +ioasid_t iommu_alloc_global_pasid_dev(struct device *dev)
> > +{
> > + int ret;
> > + ioasid_t max;
> > +
> > + max = dev->iommu->max_pasids;
> > + /*
> > + * max_pasids is set up by vendor driver based on number of
> > PASID bits
> > + * supported but the IDA allocation is inclusive.
> > + */
> > + ret = ida_alloc_range(&iommu_global_pasid_ida,
> > IOMMU_FIRST_GLOBAL_PASID, max - 1, GFP_KERNEL);
> > + if (ret < 0)
> > + return IOMMU_PASID_INVALID;
> > +
> > + return ret;
> > +}
> > +EXPORT_SYMBOL_GPL(iommu_alloc_global_pasid_dev);
>
> "dev->iommu->max_pasids == 0" indicates no pasid support on the device.
> The code should return IOMMU_PASID_INVALID explicitly. Perhaps we can
> make this function like this:
>
> ioasid_t iommu_alloc_global_pasid_dev(struct device *dev)
> {
> int ret;
>
> if (!dev->iommu->max_pasids)
> return IOMMU_PASID_INVALID;
>
> /*
> * max_pasids is set up by vendor driver based on number of
> PASID bits
> * supported but the IDA allocation is inclusive.
> */
> ret = ida_alloc_range(&iommu_global_pasid_ida,
> IOMMU_FIRST_GLOBAL_PASID,
> dev->iommu->max_pasids - 1, GFP_KERNEL);
>
> return ret < 0 ? IOMMU_PASID_INVALID : ret;
> }
> EXPORT_SYMBOL_GPL(iommu_alloc_global_pasid_dev);
>
good catch, sorry i missed this. let me send an updated version.
> Other change in this series looks good to me.
>
> I hope I can queue this series including above change as part of my VT-d
> update for v6.5 to Joerg if no objection.
>
> Let's try to re-enable this key feature of Intel idxd driver in v6.5.
>
> Best regards,
> baolu
Thanks,
Jacob
