On Fri, May 19, 2023 at 01:32:21PM -0700, Jacob Pan wrote: > Global PASID can be used beyond SVA. For example, drivers that use > Intel ENQCMD to submit work must use global PASIDs in that PASID > is stored in a per CPU MSR. When such device need to submit work > for in-kernel DMA with PASID, it must allocate PASIDs from the same > global number space to avoid conflict. > > This patch moves global PASID allocation APIs from SVA to IOMMU APIs. > Reserved PASIDs, currently only RID_PASID, are excluded from the global > PASID allocation. > > It is expected that device drivers will use the allocated PASIDs to > attach to appropriate IOMMU domains for use. > > Signed-off-by: Jacob Pan <jacob.jun.pan@xxxxxxxxxxxxxxx> > --- > v6: explicitly exclude reserved a range from SVA PASID allocation > check mm PASID compatibility with device > v5: move PASID range check inside API so that device drivers only pass > in struct device* (Kevin) > v4: move dummy functions outside ifdef CONFIG_IOMMU_SVA (Baolu) > --- > drivers/iommu/iommu-sva.c | 33 ++++++++++++++------------------- > drivers/iommu/iommu.c | 24 ++++++++++++++++++++++++ > include/linux/iommu.h | 10 ++++++++++ > 3 files changed, 48 insertions(+), 19 deletions(-) Reviewed-by: Jason Gunthorpe <jgg@xxxxxxxxxx>
